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| author | Paul Mundt <lethal@linux-sh.org> | 2010-08-20 20:26:41 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-08-20 20:26:41 +0900 |
| commit | 65c23f54c01fabae171d54c0e78df354b3709b93 (patch) | |
| tree | c661e4e44604849078dd83ba6f26e9f4fe665e12 /arch/sh/drivers | |
| parent | 53178d71b9f2d5c96bfcd2dd2c4b99c4e95a77d5 (diff) | |
| download | kernel_samsung_smdk4412-65c23f54c01fabae171d54c0e78df354b3709b93.zip kernel_samsung_smdk4412-65c23f54c01fabae171d54c0e78df354b3709b93.tar.gz kernel_samsung_smdk4412-65c23f54c01fabae171d54c0e78df354b3709b93.tar.bz2 | |
sh: Relax devfn constraints for SH7786 PCIe.
SH7786 PCIe has 1 slot per port, but no specific restriction on function.
Relax the devfn restriction and look to the slot number instead when
configured as a root complex.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers')
| -rw-r--r-- | arch/sh/drivers/pci/ops-sh7786.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/sh/drivers/pci/ops-sh7786.c b/arch/sh/drivers/pci/ops-sh7786.c index 57134a3..79a5dda 100644 --- a/arch/sh/drivers/pci/ops-sh7786.c +++ b/arch/sh/drivers/pci/ops-sh7786.c @@ -25,14 +25,15 @@ static int sh7786_pcie_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *data) { struct pci_channel *chan = bus->sysdata; - int dev, func; + int dev, func, type; dev = PCI_SLOT(devfn); func = PCI_FUNC(devfn); + type = !!bus->parent; if (bus->number > 255 || dev > 31 || func > 7) return PCIBIOS_FUNC_NOT_SUPPORTED; - if (devfn) + if (bus->parent == NULL && dev) return PCIBIOS_DEVICE_NOT_FOUND; /* Clear errors */ @@ -43,13 +44,7 @@ static int sh7786_pcie_config_access(unsigned char access_type, (func << 16) | (where & ~3), SH4A_PCIEPAR); /* Enable the configuration access */ - if (bus->number) { - /* Type 1 */ - pci_write_reg(chan, (1 << 31) | (1 << 8), SH4A_PCIEPCTLR); - } else { - /* Type 0 */ - pci_write_reg(chan, (1 << 31), SH4A_PCIEPCTLR); - } + pci_write_reg(chan, (1 << 31) | (type << 8), SH4A_PCIEPCTLR); /* Check for errors */ if (pci_read_reg(chan, SH4A_PCIEERRFR) & 0x10) |