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author | Paul Mundt <lethal@linux-sh.org> | 2007-11-21 22:46:14 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2008-01-28 13:18:54 +0900 |
commit | 9895f9429cb489ba271c06767531083ae4c4bcbe (patch) | |
tree | 5f6c410bf94021e9f1f309ad624f0add23eb92fa /arch/sh/lib64/clear_page.S | |
parent | efddb4c882a64b7ca44b2a089d20020b30a2c6dd (diff) | |
download | kernel_samsung_smdk4412-9895f9429cb489ba271c06767531083ae4c4bcbe.zip kernel_samsung_smdk4412-9895f9429cb489ba271c06767531083ae4c4bcbe.tar.gz kernel_samsung_smdk4412-9895f9429cb489ba271c06767531083ae4c4bcbe.tar.bz2 |
sh: clear/copy_page renames in lib and lib64.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/lib64/clear_page.S')
-rw-r--r-- | arch/sh/lib64/clear_page.S | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/sh/lib64/clear_page.S b/arch/sh/lib64/clear_page.S new file mode 100644 index 0000000..007ab48 --- /dev/null +++ b/arch/sh/lib64/clear_page.S @@ -0,0 +1,54 @@ +/* + Copyright 2003 Richard Curnow, SuperH (UK) Ltd. + + This file is subject to the terms and conditions of the GNU General Public + License. See the file "COPYING" in the main directory of this archive + for more details. + + Tight version of memset for the case of just clearing a page. It turns out + that having the alloco's spaced out slightly due to the increment/branch + pair causes them to contend less for access to the cache. Similarly, + keeping the stores apart from the allocos causes less contention. => Do two + separate loops. Do multiple stores per loop to amortise the + increment/branch cost a little. + + Parameters: + r2 : source effective address (start of page) + + Always clears 4096 bytes. + + Note : alloco guarded by synco to avoid TAKum03020 erratum + +*/ + + .section .text..SHmedia32,"ax" + .little + + .balign 8 + .global clear_page +clear_page: + pta/l 1f, tr1 + pta/l 2f, tr2 + ptabs/l r18, tr0 + + movi 4096, r7 + add r2, r7, r7 + add r2, r63, r6 +1: + alloco r6, 0 + synco ! TAKum03020 + addi r6, 32, r6 + bgt/l r7, r6, tr1 + + add r2, r63, r6 +2: + st.q r6, 0, r63 + st.q r6, 8, r63 + st.q r6, 16, r63 + st.q r6, 24, r63 + addi r6, 32, r6 + bgt/l r7, r6, tr2 + + blink tr0, r63 + + |