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author | Chris Metcalf <cmetcalf@tilera.com> | 2011-03-01 13:01:49 -0500 |
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committer | Chris Metcalf <cmetcalf@tilera.com> | 2011-03-10 13:30:14 -0500 |
commit | 5c7707554858eca8903706b6df7cba5c0f802244 (patch) | |
tree | 6ebb5ef933b1cf4dbca374cf2a03e249383cd41e /arch/tile/include/hv/drv_mshim_intf.h | |
parent | d91c641233ae09fcccec75313b7f55992668bf8d (diff) | |
download | kernel_samsung_smdk4412-5c7707554858eca8903706b6df7cba5c0f802244.zip kernel_samsung_smdk4412-5c7707554858eca8903706b6df7cba5c0f802244.tar.gz kernel_samsung_smdk4412-5c7707554858eca8903706b6df7cba5c0f802244.tar.bz2 |
drivers/edac: provide support for tile architecture
Add tile support for the EDAC driver, which provides unified system
error (memory, PCI, etc.) reporting. For now, the TILEPro port
reports memory correctable error (CE) only.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include/hv/drv_mshim_intf.h')
-rw-r--r-- | arch/tile/include/hv/drv_mshim_intf.h | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/tile/include/hv/drv_mshim_intf.h b/arch/tile/include/hv/drv_mshim_intf.h new file mode 100644 index 0000000..c6ef3bd --- /dev/null +++ b/arch/tile/include/hv/drv_mshim_intf.h @@ -0,0 +1,50 @@ +/* + * Copyright 2011 Tilera Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation, version 2. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or + * NON INFRINGEMENT. See the GNU General Public License for + * more details. + */ + +/** + * @file drv_mshim_intf.h + * Interface definitions for the Linux EDAC memory controller driver. + */ + +#ifndef _SYS_HV_INCLUDE_DRV_MSHIM_INTF_H +#define _SYS_HV_INCLUDE_DRV_MSHIM_INTF_H + +/** Number of memory controllers in the public API. */ +#define TILE_MAX_MSHIMS 4 + +/** Memory info under each memory controller. */ +struct mshim_mem_info +{ + uint64_t mem_size; /**< Total memory size in bytes. */ + uint8_t mem_type; /**< Memory type, DDR2 or DDR3. */ + uint8_t mem_ecc; /**< Memory supports ECC. */ +}; + +/** + * DIMM error structure. + * For now, only correctable errors are counted and the mshim doesn't record + * the error PA. HV takes panic upon uncorrectable errors. + */ +struct mshim_mem_error +{ + uint32_t sbe_count; /**< Number of single-bit errors. */ +}; + +/** Read this offset to get the memory info per mshim. */ +#define MSHIM_MEM_INFO_OFF 0x100 + +/** Read this offset to check DIMM error. */ +#define MSHIM_MEM_ERROR_OFF 0x200 + +#endif /* _SYS_HV_INCLUDE_DRV_MSHIM_INTF_H */ |