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| author | Joerg Roedel <joerg.roedel@amd.com> | 2011-04-11 11:03:18 +0200 |
|---|---|---|
| committer | Joerg Roedel <joerg.roedel@amd.com> | 2011-04-12 09:21:51 +0200 |
| commit | d99ddec3eee0be8a43b2c1ff624b9dfaaa26b959 (patch) | |
| tree | a87ad31dc20c42346f05bf74f98aa84243bf50a4 /arch/x86/include/asm/amd_iommu_types.h | |
| parent | 7d0c5cc5be73f7ce26fdcca7b8ec2203f661eb93 (diff) | |
| download | kernel_samsung_smdk4412-d99ddec3eee0be8a43b2c1ff624b9dfaaa26b959.zip kernel_samsung_smdk4412-d99ddec3eee0be8a43b2c1ff624b9dfaaa26b959.tar.gz kernel_samsung_smdk4412-d99ddec3eee0be8a43b2c1ff624b9dfaaa26b959.tar.bz2 | |
x86/amd-iommu: Add extended feature detection
This patch adds detection of the extended features of an
AMD IOMMU. The available features are printed to dmesg on
boot.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'arch/x86/include/asm/amd_iommu_types.h')
| -rw-r--r-- | arch/x86/include/asm/amd_iommu_types.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h index 878ae00..5c24e46 100644 --- a/arch/x86/include/asm/amd_iommu_types.h +++ b/arch/x86/include/asm/amd_iommu_types.h @@ -68,12 +68,25 @@ #define MMIO_CONTROL_OFFSET 0x0018 #define MMIO_EXCL_BASE_OFFSET 0x0020 #define MMIO_EXCL_LIMIT_OFFSET 0x0028 +#define MMIO_EXT_FEATURES 0x0030 #define MMIO_CMD_HEAD_OFFSET 0x2000 #define MMIO_CMD_TAIL_OFFSET 0x2008 #define MMIO_EVT_HEAD_OFFSET 0x2010 #define MMIO_EVT_TAIL_OFFSET 0x2018 #define MMIO_STATUS_OFFSET 0x2020 + +/* Extended Feature Bits */ +#define FEATURE_PREFETCH (1ULL<<0) +#define FEATURE_PPR (1ULL<<1) +#define FEATURE_X2APIC (1ULL<<2) +#define FEATURE_NX (1ULL<<3) +#define FEATURE_GT (1ULL<<4) +#define FEATURE_IA (1ULL<<6) +#define FEATURE_GA (1ULL<<7) +#define FEATURE_HE (1ULL<<8) +#define FEATURE_PC (1ULL<<9) + /* MMIO status bits */ #define MMIO_STATUS_COM_WAIT_INT_MASK 0x04 @@ -227,6 +240,7 @@ /* IOMMU capabilities */ #define IOMMU_CAP_IOTLB 24 #define IOMMU_CAP_NPCACHE 26 +#define IOMMU_CAP_EFR 27 #define MAX_DOMAIN_ID 65536 @@ -371,6 +385,9 @@ struct amd_iommu { /* flags read from acpi table */ u8 acpi_flags; + /* Extended features */ + u64 features; + /* * Capability pointer. There could be more than one IOMMU per PCI * device function if there are more than one AMD IOMMU capability |