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author | Cyrill Gorcunov <gorcunov@openvz.org> | 2011-05-19 16:45:48 -0700 |
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committer | Ingo Molnar <mingo@elte.hu> | 2011-05-20 13:41:08 +0200 |
commit | a39d1f3f67f6a3d72b24f0d8bf9a295a27ea448e (patch) | |
tree | aa58b457692aae263f6ae701480f4ea094c6df82 /arch/x86/kernel/apic | |
parent | a27d0b5e7d913b38880678ac05690f1dc737c4fd (diff) | |
download | kernel_samsung_smdk4412-a39d1f3f67f6a3d72b24f0d8bf9a295a27ea448e.zip kernel_samsung_smdk4412-a39d1f3f67f6a3d72b24f0d8bf9a295a27ea448e.tar.gz kernel_samsung_smdk4412-a39d1f3f67f6a3d72b24f0d8bf9a295a27ea448e.tar.bz2 |
x86, x2apic: Track the x2apic cluster sibling map
In the case of x2apic cluster mode, we can group IPI register
writes based on the cluster group instead of individual per-cpu
destination messages.
For this purpose, track the cpu's that belong to the same x2apic
cluster.
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: steiner@sgi.com
Cc: yinghai@kernel.org
Link: http://lkml.kernel.org/r/20110519234637.421800999@sbsiddha-MOBL3.sc.intel.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic')
-rw-r--r-- | arch/x86/kernel/apic/x2apic_cluster.c | 72 |
1 files changed, 70 insertions, 2 deletions
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c index b261799..4b2bb13 100644 --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -11,6 +11,7 @@ #include <asm/ipi.h> static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); +static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster); static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) { @@ -48,6 +49,11 @@ static void native_x2apic_icr_write(cfg, apicid); } +static inline u32 x2apic_cluster(int cpu) +{ + return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16; +} + /* * for now, we send the IPI's one by one in the cpumask. * TBD: Based on the cpu mask, we can send the IPI's to the cluster group @@ -163,14 +169,76 @@ static void x2apic_send_IPI_self(int vector) static void init_x2apic_ldr(void) { + unsigned int this_cpu = smp_processor_id(); + unsigned int cpu; + + per_cpu(x86_cpu_to_logical_apicid, this_cpu) = apic_read(APIC_LDR); + + __cpu_set(this_cpu, per_cpu(cpus_in_cluster, this_cpu)); + for_each_online_cpu(cpu) { + if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu)) + continue; + __cpu_set(this_cpu, per_cpu(cpus_in_cluster, cpu)); + __cpu_set(cpu, per_cpu(cpus_in_cluster, this_cpu)); + } +} + + /* + * At CPU state changes, update the x2apic cluster sibling info. + */ +static int __cpuinit +update_clusterinfo(struct notifier_block *nfb, unsigned long action, void *hcpu) +{ + unsigned int this_cpu = (unsigned long)hcpu; + unsigned int cpu; + int err = 0; + + switch (action) { + case CPU_UP_PREPARE: + if (!zalloc_cpumask_var(&per_cpu(cpus_in_cluster, this_cpu), + GFP_KERNEL)) { + err = -ENOMEM; + } + break; + case CPU_UP_CANCELED: + case CPU_UP_CANCELED_FROZEN: + case CPU_DEAD: + for_each_online_cpu(cpu) { + if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu)) + continue; + __cpu_clear(this_cpu, per_cpu(cpus_in_cluster, cpu)); + __cpu_clear(cpu, per_cpu(cpus_in_cluster, this_cpu)); + } + free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu)); + break; + } + + return notifier_from_errno(err); +} + +static struct notifier_block __refdata x2apic_cpu_notifier = { + .notifier_call = update_clusterinfo, +}; + +static int x2apic_init_cpu_notifier(void) +{ int cpu = smp_processor_id(); - per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR); + zalloc_cpumask_var(&per_cpu(cpus_in_cluster, cpu), GFP_KERNEL); + + BUG_ON(!per_cpu(cpus_in_cluster, cpu)); + + __cpu_set(cpu, per_cpu(cpus_in_cluster, cpu)); + register_hotcpu_notifier(&x2apic_cpu_notifier); + return 1; } static int x2apic_cluster_probe(void) { - return x2apic_mode; + if (x2apic_mode) + return x2apic_init_cpu_notifier(); + else + return 0; } struct apic apic_x2apic_cluster = { |