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authorTejun Heo <tj@kernel.org>2011-01-25 14:26:50 +0100
committerTejun Heo <tj@kernel.org>2011-01-25 14:26:50 +0100
commit19df0c2fef010e94e90df514aaf4e73f6b80145c (patch)
tree4b0b9c10622aead0d8b658cca6c49090149a91a8 /arch/x86
parentc723fdab8aa728dc2bf0da6a0de8bb9c3f588d84 (diff)
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percpu: align percpu readmostly subsection to cacheline
Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/vmlinux.lds.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index bf47007..cef446f 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -230,7 +230,7 @@ SECTIONS
* output PHDR, so the next output section - .init.text - should
* start another segment - init.
*/
- PERCPU_VADDR(0, :percpu)
+ PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
#endif
INIT_TEXT_SECTION(PAGE_SIZE)
@@ -305,7 +305,7 @@ SECTIONS
}
#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
- PERCPU(THREAD_SIZE)
+ PERCPU(INTERNODE_CACHE_BYTES, THREAD_SIZE)
#endif
. = ALIGN(PAGE_SIZE);