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authorChris Zankel <chris@zankel.net>2007-09-06 01:38:18 -0700
committerChris Zankel <chris@zankel.net>2008-02-13 16:58:51 -0800
commitb67360db143448be1f6d68835c6d0cc43837667f (patch)
tree9619e20dd17684ae5cf1d2c845b4acdc134e86be /arch/xtensa/platforms
parent49883224f6665e2b056fc3e7325b3bba9d1ff2c4 (diff)
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[XTENSA] Flush the page-address in update-mmu instead of user-address
The TLB entry for the user address doesn't exist at the time we want to flush the caches, so use the page address. Note that processor configurations with cache-aliasing issues are treated separately. Signed-off-by: Chris Zankel <chris@zankel.net>
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