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| author | Krzysztof Halasa <khc@pm.waw.pl> | 2010-05-25 18:41:46 +0200 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-05-26 13:51:01 -0700 |
| commit | 734b4157b367d66405f7dab80085d17c9c8dd3b5 (patch) | |
| tree | 24e97b20c389dfd558f3eb3b844e6f1dd17a0b40 /drivers/gpu/drm/i915/intel_crt.c | |
| parent | f953c9353f5fe6e98fa7f32f51060a74d845b5f8 (diff) | |
| download | kernel_samsung_smdk4412-734b4157b367d66405f7dab80085d17c9c8dd3b5.zip kernel_samsung_smdk4412-734b4157b367d66405f7dab80085d17c9c8dd3b5.tar.gz kernel_samsung_smdk4412-734b4157b367d66405f7dab80085d17c9c8dd3b5.tar.bz2 | |
drm/i915: Add support for interlaced display.
This doesn't change the clock limits (minimums), i.e. it won't make it
output 720x576 PAL nor 720x480 NTSC, but it will work with modes like
1080i etc. (including GLX and textured Xvideo, not sure about the
overlay).
Tested on i915 + analog VGA, it would be worth checking if newer chips
(and which ones) still support interlaced mode.
Signed-off-by: Krzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_crt.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_crt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index e16ac5a..d5c1302 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -569,7 +569,7 @@ void intel_crt_init(struct drm_device *dev) (1 << INTEL_ANALOG_CLONE_BIT) | (1 << INTEL_SDVO_LVDS_CLONE_BIT); intel_encoder->crtc_mask = (1 << 0) | (1 << 1); - connector->interlace_allowed = 0; + connector->interlace_allowed = 1; connector->doublescan_allowed = 0; drm_encoder_helper_add(&intel_encoder->enc, &intel_crt_helper_funcs); |