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authorMarek Olšák <maraeo@gmail.com>2011-01-05 05:46:48 +0100
committerDave Airlie <airlied@redhat.com>2011-01-06 13:00:45 +1000
commit9eba4a93ce520a627e876b0d1851d4f78a701c2b (patch)
treea0dbb86c2105b4ff89af724b835d0c40fbf59368 /drivers/gpu/drm/radeon/radeon.h
parent2f299d5de02da3ffb1f9e1a05c91dcd1173ebd3c (diff)
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drm/radeon/kms: manage r300 CMASK RAM access and allow CMASK clear
The CMASK RAM is for colorbuffer compression (used in conjunction with MSAA). Only one user (filp) can access it. The CMASK RAM access is managed in the same way as Hyper-Z, but there is a separate ioctl, because an app that uses MSAA does not necessarily have to use zbuffering. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 140eace..a835d95 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1168,8 +1168,9 @@ struct radeon_device {
uint8_t audio_category_code;
struct notifier_block acpi_nb;
- /* only one userspace can use Hyperz features at a time */
+ /* only one userspace can use Hyperz features or CMASK at a time */
struct drm_file *hyperz_filp;
+ struct drm_file *cmask_filp;
/* i2c buses */
struct radeon_i2c_chan *i2c_bus[RADEON_MAX_I2C_BUS];
};