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| author | Dave Airlie <airlied@redhat.com> | 2009-07-09 15:04:19 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2009-07-15 17:13:06 +1000 |
| commit | 4162338a1dab388474d4115289d1d7071623f04d (patch) | |
| tree | 89a04cbcb53c273aeb5e3534bc2c93df41f54570 /drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |
| parent | 6cdf65855cf884712532fc72770baaef7bdf1b9a (diff) | |
| download | kernel_samsung_smdk4412-4162338a1dab388474d4115289d1d7071623f04d.zip kernel_samsung_smdk4412-4162338a1dab388474d4115289d1d7071623f04d.tar.gz kernel_samsung_smdk4412-4162338a1dab388474d4115289d1d7071623f04d.tar.bz2 | |
drm/radeon/kms: set crtc and cursor offsets correctly on legacy chips.
The crtc and cursor offsets on the legacy chips are offset from
DISPLAY_BASE_ADDR. The code worked if display base addr was at 0,
but otherwise falls to pieces.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_legacy_crtc.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 8086ecf..14c1a51 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c @@ -244,7 +244,12 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &base)) { return -EINVAL; } - crtc_offset = (u32)base; + /* if scanout was in GTT this really wouldn't work */ + /* crtc offset is from display base addr not FB location */ + radeon_crtc->legacy_display_base_addr = rdev->mc.vram_location; + + base -= radeon_crtc->legacy_display_base_addr; + crtc_offset_cntl = 0; pitch_pixels = crtc->fb->pitch / (crtc->fb->bits_per_pixel / 8); @@ -303,11 +308,9 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, base &= ~7; - /* update sarea TODO */ - crtc_offset = (u32)base; - WREG32(RADEON_DISPLAY_BASE_ADDR + radeon_crtc->crtc_offset, rdev->mc.vram_location); + WREG32(RADEON_DISPLAY_BASE_ADDR + radeon_crtc->crtc_offset, radeon_crtc->legacy_display_base_addr); if (ASIC_IS_R300(rdev)) { if (radeon_crtc->crtc_id) |