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| author | Thomas Hellstrom <thellstrom@vmware.com> | 2014-07-02 15:47:04 +0200 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2014-08-06 18:07:34 +0100 |
| commit | 34762248788fc01d22199635a247fb6f0c75b59f (patch) | |
| tree | 761684e1f6734de374e569031e90fabff17fb672 /drivers/gpu/drm | |
| parent | 94f85e69a50b0136a45037a90306c172db40e4bc (diff) | |
| download | kernel_samsung_smdk4412-34762248788fc01d22199635a247fb6f0c75b59f.zip kernel_samsung_smdk4412-34762248788fc01d22199635a247fb6f0c75b59f.tar.gz kernel_samsung_smdk4412-34762248788fc01d22199635a247fb6f0c75b59f.tar.bz2 | |
drm/vmwgfx: Fix incorrect write to read-only register v2:
commit 4e578080ed3262ed2c3985868539bc66218d25c0 upstream.
Commit "drm/vmwgfx: correct fb_fix_screeninfo.line_length", while fixing a
vmwgfx fbdev bug, also writes the pitch to a supposedly read-only register:
SVGA_REG_BYTES_PER_LINE, while it should be (and also in fact is) written to
SVGA_REG_PITCHLOCK.
This patch is Cc'd stable because of the unknown effects writing to this
register might have, particularly on older device versions.
v2: Updated log message.
Cc: Christopher Friedt <chrisfriedt@gmail.com>
Tested-by: Christopher Friedt <chrisfriedt@gmail.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c index 907c26f..7f16ff2 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c @@ -179,7 +179,6 @@ static int vmw_fb_set_par(struct fb_info *info) vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, info->var.yoffset); vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, info->var.xres); vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, info->var.yres); - vmw_write(vmw_priv, SVGA_REG_BYTES_PER_LINE, info->fix.line_length); vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID); } |