diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2014-01-16 18:11:47 -0500 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2014-04-02 00:58:44 +0100 |
| commit | 7bf56b6a9a77bab5f7fc8f870d348e8374f6e626 (patch) | |
| tree | 37c2a8a56f2c457cad75dbc24f6a9acb8590e258 /drivers/gpu | |
| parent | 03ee9dc36ecb95b78f91ad111d9340ec37efe969 (diff) | |
| download | kernel_samsung_smdk4412-7bf56b6a9a77bab5f7fc8f870d348e8374f6e626.zip kernel_samsung_smdk4412-7bf56b6a9a77bab5f7fc8f870d348e8374f6e626.tar.gz kernel_samsung_smdk4412-7bf56b6a9a77bab5f7fc8f870d348e8374f6e626.tar.bz2 | |
drm/radeon: set the full cache bit for fences on r7xx+
commit d45b964a22cad962d3ede1eba8d24f5cee7b2a92 upstream.
Needed to properly flush the read caches for fences.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[bwh: Backported to 3.2:
- Adjust context
- s/\bring\b/rdev/]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 14 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r600d.h | 1 |
2 files changed, 9 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 57e45c6..f7e3cc0 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -2315,14 +2315,18 @@ int r600_ring_test(struct radeon_device *rdev) void r600_fence_ring_emit(struct radeon_device *rdev, struct radeon_fence *fence) { + u32 cp_coher_cntl = PACKET3_TC_ACTION_ENA | PACKET3_VC_ACTION_ENA | + PACKET3_SH_ACTION_ENA; + + if (rdev->family >= CHIP_RV770) + cp_coher_cntl |= PACKET3_FULL_CACHE_ENA; + if (rdev->wb.use_event) { u64 addr = rdev->wb.gpu_addr + R600_WB_EVENT_OFFSET + (u64)(rdev->fence_drv.scratch_reg - rdev->scratch.reg_base); /* flush read cache over gart */ radeon_ring_write(rdev, PACKET3(PACKET3_SURFACE_SYNC, 3)); - radeon_ring_write(rdev, PACKET3_TC_ACTION_ENA | - PACKET3_VC_ACTION_ENA | - PACKET3_SH_ACTION_ENA); + radeon_ring_write(rdev, cp_coher_cntl); radeon_ring_write(rdev, 0xFFFFFFFF); radeon_ring_write(rdev, 0); radeon_ring_write(rdev, 10); /* poll interval */ @@ -2336,9 +2340,7 @@ void r600_fence_ring_emit(struct radeon_device *rdev, } else { /* flush read cache over gart */ radeon_ring_write(rdev, PACKET3(PACKET3_SURFACE_SYNC, 3)); - radeon_ring_write(rdev, PACKET3_TC_ACTION_ENA | - PACKET3_VC_ACTION_ENA | - PACKET3_SH_ACTION_ENA); + radeon_ring_write(rdev, cp_coher_cntl); radeon_ring_write(rdev, 0xFFFFFFFF); radeon_ring_write(rdev, 0); radeon_ring_write(rdev, 10); /* poll interval */ diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index d4d23a8d..cb29480 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h @@ -838,6 +838,7 @@ #define PACKET3_INDIRECT_BUFFER 0x32 #define PACKET3_SURFACE_SYNC 0x43 # define PACKET3_CB0_DEST_BASE_ENA (1 << 6) +# define PACKET3_FULL_CACHE_ENA (1 << 20) /* r7xx+ only */ # define PACKET3_TC_ACTION_ENA (1 << 23) # define PACKET3_VC_ACTION_ENA (1 << 24) # define PACKET3_CB_ACTION_ENA (1 << 25) |