diff options
author | Imre Deak <imre.deak@intel.com> | 2013-08-23 23:50:23 +0300 |
---|---|---|
committer | Ben Hutchings <ben@decadent.org.uk> | 2013-09-10 01:57:36 +0100 |
commit | 95b59c0baa5253dd3a1e8191700c2706bd2f0c66 (patch) | |
tree | 5546784b4926bf4a9883147805d553f7daf37fb0 /drivers/gpu | |
parent | fbbd6511ab0dff8a79fc5803250b77a1260be354 (diff) | |
download | kernel_samsung_smdk4412-95b59c0baa5253dd3a1e8191700c2706bd2f0c66.zip kernel_samsung_smdk4412-95b59c0baa5253dd3a1e8191700c2706bd2f0c66.tar.gz kernel_samsung_smdk4412-95b59c0baa5253dd3a1e8191700c2706bd2f0c66.tar.bz2 |
drm/i915: ivb: fix edp voltage swing reg val
commit 77fa4cbd5fa389e28419bbe8ac491b5fdd54840d upstream.
Fix the typo introduced in
commit 1a2eb4604b85c5efb343da8a4dcf41288fcfca85
Author: Keith Packard <keithp@keithp.com>
Date: Wed Nov 16 16:26:07 2011 -0800
drm/i915: Hook up Ivybridge eDP
This fixes eDP link-training failures and cases where all voltage swing
/pre-emphasis levels were tried and failed during clock recovery and -
as a fallback - we go on to do channel equalization with the last voltage
swing/pre-emphasis level which will succeed. Both issues can lead to a
blank screen.
v2:
- improve commit message
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64880
Tested-by: Jeremy Moles <cubicool@gmail.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 7d43a45..97a050f 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3516,7 +3516,7 @@ #define EDP_LINK_TRAIN_600MV_0DB_IVB (0x30 <<22) #define EDP_LINK_TRAIN_600MV_3_5DB_IVB (0x36 <<22) #define EDP_LINK_TRAIN_800MV_0DB_IVB (0x38 <<22) -#define EDP_LINK_TRAIN_800MV_3_5DB_IVB (0x33 <<22) +#define EDP_LINK_TRAIN_800MV_3_5DB_IVB (0x3e <<22) /* legacy values */ #define EDP_LINK_TRAIN_500MV_0DB_IVB (0x00 <<22) |