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author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2010-02-19 11:52:01 +0100 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2010-02-26 13:23:22 -0800 |
commit | 922a2efc1b6ef48e2783f7efeb3a94e952c7ed14 (patch) | |
tree | 68cc2a5ee7029fa49cc8b9cccb57ea00003196b5 /drivers/gpu | |
parent | 4df2faf4512c2e2ffa6793e055c73a4e7b8b5e36 (diff) | |
download | kernel_samsung_smdk4412-922a2efc1b6ef48e2783f7efeb3a94e952c7ed14.zip kernel_samsung_smdk4412-922a2efc1b6ef48e2783f7efeb3a94e952c7ed14.tar.gz kernel_samsung_smdk4412-922a2efc1b6ef48e2783f7efeb3a94e952c7ed14.tar.bz2 |
drm/i915: clean-up i915_gem_flush_gpu_write_domain
Now that we have an exact gpu write domain tracking, we don't need
to move objects to the active list ourself. i915_add_request will
take care of that under all circumstances.
Idea stolen from a patch by Chris Wilson <chris@chris-wilson.co.uk>.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 2571d1f..6fe54db 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2748,7 +2748,6 @@ static void i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj) { struct drm_device *dev = obj->dev; - uint32_t seqno; uint32_t old_write_domain; if ((obj->write_domain & I915_GEM_GPU_DOMAINS) == 0) @@ -2757,9 +2756,8 @@ i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj) /* Queue the GPU write cache flushing we need. */ old_write_domain = obj->write_domain; i915_gem_flush(dev, 0, obj->write_domain); - seqno = i915_add_request(dev, NULL, obj->write_domain); + (void) i915_add_request(dev, NULL, obj->write_domain); BUG_ON(obj->write_domain); - i915_gem_object_move_to_active(obj, seqno); trace_i915_gem_object_change_domain(obj, obj->read_domains, |