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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-03-04 12:01:41 -0800 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-03-20 13:16:44 +0000 |
| commit | a4b6d516a6079c6ba8dc97d185371439035a35d0 (patch) | |
| tree | b53616a18b80d9d35a865ece4d4e3711c8dea074 /drivers/mtd/nand/davinci_nand.c | |
| parent | 7ed8c7d440d497913a2218831a67b5897e0e86e1 (diff) | |
| download | kernel_samsung_smdk4412-a4b6d516a6079c6ba8dc97d185371439035a35d0.zip kernel_samsung_smdk4412-a4b6d516a6079c6ba8dc97d185371439035a35d0.tar.gz kernel_samsung_smdk4412-a4b6d516a6079c6ba8dc97d185371439035a35d0.tar.bz2 | |
[MTD] partitioning utility predicates
Move mtd_has_partitions() and mtd_has_cmdlinepart() inlines from a
DaVinci-specific driver to the <linux/mtd/partitions.h> header.
Use those to eliminate #ifdefs in two drivers which had their own
definitions of mtd_has_partitions().
Quite a lot of other MTD drivers could benefit from using use one or both
of these to remove #ifdeffery. Maybe some Janitors would like to help.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand/davinci_nand.c')
| -rw-r--r-- | drivers/mtd/nand/davinci_nand.c | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index 4034ac9..81f7ecd 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -38,19 +38,6 @@ #include <asm/mach-types.h> -#ifdef CONFIG_MTD_PARTITIONS -static inline int mtd_has_partitions(void) { return 1; } -#else -static inline int mtd_has_partitions(void) { return 0; } -#endif - -#ifdef CONFIG_MTD_CMDLINE_PARTS -static inline int mtd_has_cmdlinepart(void) { return 1; } -#else -static inline int mtd_has_cmdlinepart(void) { return 0; } -#endif - - /* * This is a device driver for the NAND flash controller found on the * various DaVinci family chips. It handles up to four SoC chipselects, |