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| author | Chuanxiao Dong <chuanxiao.dong@intel.com> | 2010-08-06 18:19:09 +0800 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2010-08-06 16:30:26 +0100 |
| commit | 08b9ab9996c7e582f86da319f43d2dcb8ff55993 (patch) | |
| tree | de127bcf41c849449ecef88fae8b226f0e2f61fd /drivers/mtd/nand/denali.c | |
| parent | db9a321049ead6424848b1040a714290d5df39d7 (diff) | |
| download | kernel_samsung_smdk4412-08b9ab9996c7e582f86da319f43d2dcb8ff55993.zip kernel_samsung_smdk4412-08b9ab9996c7e582f86da319f43d2dcb8ff55993.tar.gz kernel_samsung_smdk4412-08b9ab9996c7e582f86da319f43d2dcb8ff55993.tar.bz2 | |
mtd: denali: Add multi connected NAND support
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand/denali.c')
| -rw-r--r-- | drivers/mtd/nand/denali.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index f20d1b1..1422edd 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -1677,6 +1677,25 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) goto failed_nand; } + /* support for multi nand + * MTD known nothing about multi nand, + * so we should tell it the real pagesize + * and anything necessery + */ + denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED); + denali->nand.chipsize <<= (denali->devnum - 1); + denali->nand.page_shift += (denali->devnum - 1); + denali->nand.pagemask = (denali->nand.chipsize >> + denali->nand.page_shift) - 1; + denali->nand.bbt_erase_shift += (denali->devnum - 1); + denali->nand.phys_erase_shift = denali->nand.bbt_erase_shift; + denali->nand.chip_shift += (denali->devnum - 1); + denali->mtd.writesize <<= (denali->devnum - 1); + denali->mtd.oobsize <<= (denali->devnum - 1); + denali->mtd.erasesize <<= (denali->devnum - 1); + denali->mtd.size = denali->nand.numchips * denali->nand.chipsize; + denali->bbtskipbytes *= denali->devnum; + /* second stage of the NAND scan * this stage requires information regarding ECC and * bad block management. */ @@ -1713,6 +1732,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali_write32(8, denali->flash_reg + ECC_CORRECTION); } + denali->nand.ecc.bytes *= denali->devnum; denali->nand.ecc.layout->eccbytes *= denali->mtd.writesize / ECC_SECTOR_SIZE; denali->nand.ecc.layout->oobfree[0].offset = @@ -1738,7 +1758,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali->nand.ecc.hwctl = denali_ecc_hwctl; /* override the default read operations */ - denali->nand.ecc.size = denali->mtd.writesize; + denali->nand.ecc.size = ECC_SECTOR_SIZE * denali->devnum; denali->nand.ecc.read_page = denali_read_page; denali->nand.ecc.read_page_raw = denali_read_page_raw; denali->nand.ecc.write_page = denali_write_page; |