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| author | Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> | 2009-02-01 01:18:58 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-02-01 01:18:58 -0800 |
| commit | eb7f139ce523bfe03b1628c66d3e1d50f3c07196 (patch) | |
| tree | d41b641e1a94911aaddc22b63d3d470f6cfd3ef1 /drivers/net/ixgbe/ixgbe_82598.c | |
| parent | 2f21bdd3542838dc5513a585a32aa13f01b019e7 (diff) | |
| download | kernel_samsung_smdk4412-eb7f139ce523bfe03b1628c66d3e1d50f3c07196.zip kernel_samsung_smdk4412-eb7f139ce523bfe03b1628c66d3e1d50f3c07196.tar.gz kernel_samsung_smdk4412-eb7f139ce523bfe03b1628c66d3e1d50f3c07196.tar.bz2 | |
ixgbe: Refactor MSI-X allocation mechanism
Our current MSI-X allocation mechanism does not support new hardware
at all. It also isn't getting the actual number of supported MSI-X vectors
from the device.
This patch allows the number of MSI-X vectors to be specific to a device,
plus it gets the number of MSI-X vectors available from PCIe configuration
space.
Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_82598.c')
| -rw-r--r-- | drivers/net/ixgbe/ixgbe_82598.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c index dffe7f0..7fb4b86 100644 --- a/drivers/net/ixgbe/ixgbe_82598.c +++ b/drivers/net/ixgbe/ixgbe_82598.c @@ -50,6 +50,27 @@ static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data); /** + * ixgbe_get_pcie_msix_count_82598 - Gets MSI-X vector count + * @hw: pointer to hardware structure + * + * Read PCIe configuration space, and get the MSI-X vector count from + * the capabilities table. + **/ +u16 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw) +{ + struct ixgbe_adapter *adapter = hw->back; + u16 msix_count; + pci_read_config_word(adapter->pdev, IXGBE_PCIE_MSIX_82598_CAPS, + &msix_count); + msix_count &= IXGBE_PCIE_MSIX_TBL_SZ_MASK; + + /* MSI-X count is zero-based in HW, so increment to give proper value */ + msix_count++; + + return msix_count; +} + +/** */ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw) { @@ -106,6 +127,7 @@ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw) mac->num_rar_entries = IXGBE_82598_RAR_ENTRIES; mac->max_rx_queues = IXGBE_82598_MAX_RX_QUEUES; mac->max_tx_queues = IXGBE_82598_MAX_TX_QUEUES; + mac->max_msix_vectors = ixgbe_get_pcie_msix_count_82598(hw); out: return ret_val; |