diff options
| author | Giuseppe CAVALLARO <peppe.cavallaro@st.com> | 2010-09-17 03:23:39 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-09-17 16:12:56 -0700 |
| commit | dfb8fb96ae2b5126cd0c08c0ccd7c42e1f46568a (patch) | |
| tree | 9727f43bae819ece67c1c9bc26b3cb52e236e5ce /drivers/net/stmmac | |
| parent | 67c9660831f6b6b76866a0838466c83765ffbbd3 (diff) | |
| download | kernel_samsung_smdk4412-dfb8fb96ae2b5126cd0c08c0ccd7c42e1f46568a.zip kernel_samsung_smdk4412-dfb8fb96ae2b5126cd0c08c0ccd7c42e1f46568a.tar.gz kernel_samsung_smdk4412-dfb8fb96ae2b5126cd0c08c0ccd7c42e1f46568a.tar.bz2 | |
stmmac: add CSR Clock range selection
This patch adds the CSR Clock range selection.
Original patch from Johannes Stezenbach fixed the CSR
in the stmmac_mdio. We agreed to provide this through
the platform instead of.
Also thanks to Johannes for having tested it on ARM.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/stmmac')
| -rw-r--r-- | drivers/net/stmmac/stmmac.h | 1 | ||||
| -rw-r--r-- | drivers/net/stmmac/stmmac_main.c | 1 | ||||
| -rw-r--r-- | drivers/net/stmmac/stmmac_mdio.c | 5 |
3 files changed, 5 insertions, 2 deletions
diff --git a/drivers/net/stmmac/stmmac.h b/drivers/net/stmmac/stmmac.h index d0ddab0..12d1cb0 100644 --- a/drivers/net/stmmac/stmmac.h +++ b/drivers/net/stmmac/stmmac.h @@ -78,6 +78,7 @@ struct stmmac_priv { unsigned int flow_ctrl; unsigned int pause; struct mii_bus *mii; + int mii_clk_csr; u32 msg_enable; spinlock_t lock; diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c index 03c160c..a169b14 100644 --- a/drivers/net/stmmac/stmmac_main.c +++ b/drivers/net/stmmac/stmmac_main.c @@ -1704,6 +1704,7 @@ static int stmmac_dvr_probe(struct platform_device *pdev) plat_dat = pdev->dev.platform_data; priv->bus_id = plat_dat->bus_id; priv->pbl = plat_dat->pbl; /* TLI */ + priv->mii_clk_csr = plat_dat->clk_csr; priv->is_gmac = plat_dat->has_gmac; /* GMAC is on board */ priv->enh_desc = plat_dat->enh_desc; priv->ioaddr = addr; diff --git a/drivers/net/stmmac/stmmac_mdio.c b/drivers/net/stmmac/stmmac_mdio.c index 03dea14..d744161 100644 --- a/drivers/net/stmmac/stmmac_mdio.c +++ b/drivers/net/stmmac/stmmac_mdio.c @@ -53,7 +53,7 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) int data; u16 regValue = (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0))); - regValue |= MII_BUSY; /* in case of GMAC */ + regValue |= MII_BUSY | ((priv->mii_clk_csr & 7) << 2); do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); writel(regValue, priv->ioaddr + mii_address); @@ -85,7 +85,8 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0))) | MII_WRITE; - value |= MII_BUSY; + value |= MII_BUSY | ((priv->mii_clk_csr & 7) << 2); + /* Wait until any existing MII operation is complete */ do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); |