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| author | Patrick McHardy <kaber@trash.net> | 2009-06-11 16:00:49 +0200 |
|---|---|---|
| committer | Patrick McHardy <kaber@trash.net> | 2009-06-11 16:00:49 +0200 |
| commit | 36432dae73cf2c90a59b39c8df9fd8219272b005 (patch) | |
| tree | 660b9104305a809ec4fdeb295ca13d6e90790ecc /drivers/net/ucc_geth.h | |
| parent | 440f0d588555892601cfe511728a0fc0c8204063 (diff) | |
| parent | bb400801c2f40bbd9a688818323ad09abfc4e581 (diff) | |
| download | kernel_samsung_smdk4412-36432dae73cf2c90a59b39c8df9fd8219272b005.zip kernel_samsung_smdk4412-36432dae73cf2c90a59b39c8df9fd8219272b005.tar.gz kernel_samsung_smdk4412-36432dae73cf2c90a59b39c8df9fd8219272b005.tar.bz2 | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6
Diffstat (limited to 'drivers/net/ucc_geth.h')
| -rw-r--r-- | drivers/net/ucc_geth.h | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h index dca628a..deb962b 100644 --- a/drivers/net/ucc_geth.h +++ b/drivers/net/ucc_geth.h @@ -1,5 +1,5 @@ /* - * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved. + * Copyright (C) Freescale Semicondutor, Inc. 2006-2009. All rights reserved. * * Author: Shlomi Gridish <gridish@freescale.com> * @@ -193,6 +193,31 @@ struct ucc_geth { #define ENET_TBI_MII_JD 0x10 /* Jitter diagnostics */ #define ENET_TBI_MII_TBICON 0x11 /* TBI control */ +/* TBI MDIO register bit fields*/ +#define TBISR_LSTATUS 0x0004 +#define TBICON_CLK_SELECT 0x0020 +#define TBIANA_ASYMMETRIC_PAUSE 0x0100 +#define TBIANA_SYMMETRIC_PAUSE 0x0080 +#define TBIANA_HALF_DUPLEX 0x0040 +#define TBIANA_FULL_DUPLEX 0x0020 +#define TBICR_PHY_RESET 0x8000 +#define TBICR_ANEG_ENABLE 0x1000 +#define TBICR_RESTART_ANEG 0x0200 +#define TBICR_FULL_DUPLEX 0x0100 +#define TBICR_SPEED1_SET 0x0040 + +#define TBIANA_SETTINGS ( \ + TBIANA_ASYMMETRIC_PAUSE \ + | TBIANA_SYMMETRIC_PAUSE \ + | TBIANA_FULL_DUPLEX \ + ) +#define TBICR_SETTINGS ( \ + TBICR_PHY_RESET \ + | TBICR_ANEG_ENABLE \ + | TBICR_FULL_DUPLEX \ + | TBICR_SPEED1_SET \ + ) + /* UCC GETH MACCFG1 (MAC Configuration 1 Register) */ #define MACCFG1_FLOW_RX 0x00000020 /* Flow Control Rx */ @@ -1188,6 +1213,7 @@ struct ucc_geth_private { struct ugeth_mii_info *mii_info; struct phy_device *phydev; + struct phy_device *tbiphy; phy_interface_t phy_interface; int max_speed; uint32_t msg_enable; |