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| author | Luis R. Rodriguez <lrodriguez@atheros.com> | 2010-06-21 18:38:47 -0400 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2010-06-23 15:14:00 -0400 |
| commit | 9a658d2b5c222b62919ab47b11c907c731ac180a (patch) | |
| tree | 80d12299df8955d526c1103f2e3a7f6d9882c1c2 /drivers/net/wireless/ath/ath9k/reg.h | |
| parent | 1047d5edd4838f27dc86f24676178f2249c446ea (diff) | |
| download | kernel_samsung_smdk4412-9a658d2b5c222b62919ab47b11c907c731ac180a.zip kernel_samsung_smdk4412-9a658d2b5c222b62919ab47b11c907c731ac180a.tar.gz kernel_samsung_smdk4412-9a658d2b5c222b62919ab47b11c907c731ac180a.tar.bz2 | |
ath9k_hw: fix ASPM setting for AR9003
The AR_WA register should not be read when in sleep state so
add a variable we can stash its value into for when we need
to set it. Additionally the AR_WA_D3_TO_L1_DISABLE_REAL
(bit 16) needs to be removed.
Cc: Aeolus Yang <aeolus.yang@atheros.com>
Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com>
signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/reg.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/reg.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index 3e3ccef..47be667 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h @@ -704,6 +704,11 @@ #define AR_WA_BIT7 (1 << 7) #define AR_WA_BIT23 (1 << 23) #define AR_WA_D3_L1_DISABLE (1 << 14) +#define AR_WA_D3_TO_L1_DISABLE_REAL (1 << 16) +#define AR_WA_ASPM_TIMER_BASED_DISABLE (1 << 17) +#define AR_WA_RESET_EN (1 << 18) /* Sw Control to enable PCI-Reset to POR (bit 15) */ +#define AR_WA_ANALOG_SHIFT (1 << 20) +#define AR_WA_POR_SHORT (1 << 21) /* PCI-E Phy reset control */ #define AR9285_WA_DEFAULT 0x004a050b #define AR9280_WA_DEFAULT 0x0040073b #define AR_WA_DEFAULT 0x0000073f |