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| author | Andrew Victor <andrew@sanpeople.com> | 2006-11-30 14:34:53 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-11-30 22:51:38 +0000 |
| commit | 6171de8f57e80873436345a9c7ba8bae800e577b (patch) | |
| tree | 0f817644248e029fcc8f90d144a9027c37e0fd50 /include/asm-arm/arch-at91rm9200/at91_pdc.h | |
| parent | 62c1660d908c44663c63ad6c679f6afa1d33c5f6 (diff) | |
| download | kernel_samsung_smdk4412-6171de8f57e80873436345a9c7ba8bae800e577b.zip kernel_samsung_smdk4412-6171de8f57e80873436345a9c7ba8bae800e577b.tar.gz kernel_samsung_smdk4412-6171de8f57e80873436345a9c7ba8bae800e577b.tar.bz2 | |
[ARM] 3950/1: AT91: Split up system header file
The AT91RM9200 system header file (at91rm9200_sys.h) has been split into
separate header files for each peripheral. This was necessary since
some of the system peripherals are also used on AT91SAM9260 and
AT91SAM9261.
The new SAM9-specific register bits have also been defined.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/at91_pdc.h')
| -rw-r--r-- | include/asm-arm/arch-at91rm9200/at91_pdc.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/include/asm-arm/arch-at91rm9200/at91_pdc.h b/include/asm-arm/arch-at91rm9200/at91_pdc.h new file mode 100644 index 0000000..79d6e02 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_pdc.h @@ -0,0 +1,36 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_pdc.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Peripheral Data Controller (PDC) registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_PDC_H +#define AT91_PDC_H + +#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ +#define AT91_PDC_RCR 0x104 /* Receive Counter Register */ +#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */ +#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */ +#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */ +#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */ +#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ +#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */ + +#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */ +#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ +#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ +#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ +#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ + +#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */ + +#endif |