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| author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-01-04 17:17:16 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-01-04 17:17:16 +0000 |
| commit | 7a94283a7e8cd8a4ea29bf2cfedba511c706b0b4 (patch) | |
| tree | e17f02bc7dbe7338ab9b70753978d1c0270ad6b6 /include/asm-arm | |
| parent | b721243a6700b2ecc11f7b920d3d5d6718c5d148 (diff) | |
| download | kernel_samsung_smdk4412-7a94283a7e8cd8a4ea29bf2cfedba511c706b0b4.zip kernel_samsung_smdk4412-7a94283a7e8cd8a4ea29bf2cfedba511c706b0b4.tar.gz kernel_samsung_smdk4412-7a94283a7e8cd8a4ea29bf2cfedba511c706b0b4.tar.bz2 | |
[ARM] 3224/1: add masked thread interrupt status registers for ixp2000
Patch from Lennert Buytenhek
In its interrupt handler, the (NAPI) ixp2000 netdev driver needs to use
the masked thread interrupt status register (instead of the raw one) to
prevent scheduling polling when polling is already running when a TXdone
interrupt comes in. The definitions for the masked status registers were
not in yet, so this patch adds them.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/arch-ixp2000/ixp2000-regs.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h index fc5ac6a..8cf70ff 100644 --- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h +++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h @@ -156,6 +156,14 @@ #define IXP2000_IRQ_THD_RAW_STATUS_B_1 IXP2000_INTCTL_REG(0x84) #define IXP2000_IRQ_THD_RAW_STATUS_B_2 IXP2000_INTCTL_REG(0x88) #define IXP2000_IRQ_THD_RAW_STATUS_B_3 IXP2000_INTCTL_REG(0x8c) +#define IXP2000_IRQ_THD_STATUS_A_0 IXP2000_INTCTL_REG(0xe0) +#define IXP2000_IRQ_THD_STATUS_A_1 IXP2000_INTCTL_REG(0xe4) +#define IXP2000_IRQ_THD_STATUS_A_2 IXP2000_INTCTL_REG(0xe8) +#define IXP2000_IRQ_THD_STATUS_A_3 IXP2000_INTCTL_REG(0xec) +#define IXP2000_IRQ_THD_STATUS_B_0 IXP2000_INTCTL_REG(0x100) +#define IXP2000_IRQ_THD_STATUS_B_1 IXP2000_INTCTL_REG(0x104) +#define IXP2000_IRQ_THD_STATUS_B_2 IXP2000_INTCTL_REG(0x108) +#define IXP2000_IRQ_THD_STATUS_B_3 IXP2000_INTCTL_REG(0x10c) #define IXP2000_IRQ_THD_ENABLE_SET_A_0 IXP2000_INTCTL_REG(0x160) #define IXP2000_IRQ_THD_ENABLE_SET_A_1 IXP2000_INTCTL_REG(0x164) #define IXP2000_IRQ_THD_ENABLE_SET_A_2 IXP2000_INTCTL_REG(0x168) |