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authorJohn Linn <john.linn@xilinx.com>2008-07-02 15:11:28 -0700
committerGrant Likely <grant.likely@secretlab.ca>2008-07-04 00:58:59 -0600
commitd58577d8f36f66dbb5dec30fc01dfddda0cfd1fa (patch)
tree92840d18b50ccaa63fbc4aec85c962223c5e9982 /include/asm-m68k/zorro.h
parentdc568ec4906ac2478e2d692adc6b12fbb6e4657e (diff)
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powerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 440
The following changes add processing to initialize the Xilinx 16550 UART in the boot wrapper for Virtex targets without firmware. Normally the boot wrapper assumes that the serial port has already been initialized by firmware. The wrapper was also modified to add the 440 build. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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