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authorRalf Baechle <ralf@linux-mips.org>2005-12-06 09:43:20 +0000
committer <ralf@denk.linux-mips.net>2006-01-10 13:39:04 +0000
commit07a801def46f412a7ce6de9553dfd8895bf33356 (patch)
treee46385e7d44fa8218b55d885e73f1b5ac9ca9944 /include/asm-mips/dsp.h
parentf12555d24ca636569b51c6f104aab41b2bba8c32 (diff)
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MIPS: DSP: Set all register masks to 0x3ff.
0x2ff was a typo and the value 0x1f of DSP_MASK was refering to an old version of the documentation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/dsp.h')
-rw-r--r--include/asm-mips/dsp.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h
index 2fb8aa3..e9bfc08 100644
--- a/include/asm-mips/dsp.h
+++ b/include/asm-mips/dsp.h
@@ -16,7 +16,7 @@
#include <asm/mipsregs.h>
#define DSP_DEFAULT 0x00000000
-#define DSP_MASK 0x1f
+#define DSP_MASK 0x3ff
#define __enable_dsp_hazard() \
do { \
@@ -48,7 +48,7 @@ do { \
tsk->thread.dsp.dspr[3] = mflo2(); \
tsk->thread.dsp.dspr[4] = mfhi3(); \
tsk->thread.dsp.dspr[5] = mflo3(); \
- tsk->thread.dsp.dspcontrol = rddsp(0x2ff); \
+ tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK); \
} while (0)
#define save_dsp(tsk) \
@@ -65,7 +65,7 @@ do { \
mtlo2(tsk->thread.dsp.dspr[3]); \
mthi3(tsk->thread.dsp.dspr[4]); \
mtlo3(tsk->thread.dsp.dspr[5]); \
- wrdsp(tsk->thread.dsp.dspcontrol, 0x2ff); \
+ wrdsp(tsk->thread.dsp.dspcontrol, DSP_MASK); \
} while (0)
#define restore_dsp(tsk) \