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authorYouquan Song <youquan.song@intel.com>2008-10-16 16:31:56 -0700
committerDavid Woodhouse <David.Woodhouse@intel.com>2008-10-17 08:05:01 +0100
commita77b67d4023770805141014b8fa9eb5467457817 (patch)
tree661dda1d33b8892f1e1fa2508565a288712592b9 /include/linux/intel-iommu.h
parent3481f21097cb560392c411377893b5109fbde557 (diff)
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dmar: Use queued invalidation interface for IOTLB and context invalidation
If queued invalidation interface is available and enabled, queued invalidation interface will be used instead of the register based interface. According to Vt-d2 specification, when queued invalidation is enabled, invalidation command submit works only through invalidation queue and not through the command registers interface. Signed-off-by: Youquan Song <youquan.song@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include/linux/intel-iommu.h')
-rw-r--r--include/linux/intel-iommu.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 0c5f5e4..afb0d2a 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -278,6 +278,13 @@ struct ir_table {
};
#endif
+struct iommu_flush {
+ int (*flush_context)(struct intel_iommu *iommu, u16 did, u16 sid, u8 fm,
+ u64 type, int non_present_entry_flush);
+ int (*flush_iotlb)(struct intel_iommu *iommu, u16 did, u64 addr,
+ unsigned int size_order, u64 type, int non_present_entry_flush);
+};
+
struct intel_iommu {
void __iomem *reg; /* Pointer to hardware regs, virtual addr */
u64 cap;
@@ -297,6 +304,7 @@ struct intel_iommu {
unsigned char name[7]; /* Device Name */
struct msi_msg saved_msg;
struct sys_device sysdev;
+ struct iommu_flush flush;
#endif
struct q_inval *qi; /* Queued invalidation info */
#ifdef CONFIG_INTR_REMAP