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| author | Sheng Yang <sheng@linux.intel.com> | 2008-11-11 17:17:46 +0800 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2009-01-07 11:12:24 -0800 |
| commit | f7b7baae6b30ff04124259ff8d7c0c0d281320e6 (patch) | |
| tree | 5c380e022c8ebb89dd3d5fac7f63b5ae8d45f5c3 /include/linux/pci_regs.h | |
| parent | d91cdc745524a1b1ff537712a62803b8413c12d6 (diff) | |
| download | kernel_samsung_smdk4412-f7b7baae6b30ff04124259ff8d7c0c0d281320e6.zip kernel_samsung_smdk4412-f7b7baae6b30ff04124259ff8d7c0c0d281320e6.tar.gz kernel_samsung_smdk4412-f7b7baae6b30ff04124259ff8d7c0c0d281320e6.tar.bz2 | |
PCI: add PCI Advanced Feature Capability defines
PCI Advanced Features Capability is introduced by "Conventional PCI
Advanced Caps ECN" (can be downloaded in pcisig.com). Add defines for
the various AF capabilities, including function level reset (FLR).
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Sheng Yang <sheng@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'include/linux/pci_regs.h')
| -rw-r--r-- | include/linux/pci_regs.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index e5effd4..7766488 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -210,6 +210,7 @@ #define PCI_CAP_ID_AGP3 0x0E /* AGP Target PCI-PCI bridge */ #define PCI_CAP_ID_EXP 0x10 /* PCI Express */ #define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ +#define PCI_CAP_ID_AF 0x13 /* PCI Advanced Features */ #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ #define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */ #define PCI_CAP_SIZEOF 4 @@ -316,6 +317,17 @@ #define PCI_CHSWP_EXT 0x40 /* ENUM# status - extraction */ #define PCI_CHSWP_INS 0x80 /* ENUM# status - insertion */ +/* PCI Advanced Feature registers */ + +#define PCI_AF_LENGTH 2 +#define PCI_AF_CAP 3 +#define PCI_AF_CAP_TP 0x01 +#define PCI_AF_CAP_FLR 0x02 +#define PCI_AF_CTRL 4 +#define PCI_AF_CTRL_FLR 0x01 +#define PCI_AF_STATUS 5 +#define PCI_AF_STATUS_TP 0x01 + /* PCI-X registers */ #define PCI_X_CMD 2 /* Modes & Features */ |