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author | Huacai Chen <chenhc@lemote.com> | 2014-03-22 17:21:44 +0800 |
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committer | Ben Hutchings <ben@decadent.org.uk> | 2014-04-30 16:23:24 +0100 |
commit | 258f96215696a32844bb6ed9da446cb550bd8396 (patch) | |
tree | 94406347d219b928384e9bcf215748bb8075d243 /sound/pci | |
parent | 2791a9e4eb2e0086dba46782876cf6d567182259 (diff) | |
download | kernel_samsung_smdk4412-258f96215696a32844bb6ed9da446cb550bd8396.zip kernel_samsung_smdk4412-258f96215696a32844bb6ed9da446cb550bd8396.tar.gz kernel_samsung_smdk4412-258f96215696a32844bb6ed9da446cb550bd8396.tar.bz2 |
MIPS: Hibernate: Flush TLB entries in swsusp_arch_resume()
commit c14af233fbe279d0e561ecf84f1208b1bae087ef upstream.
The original MIPS hibernate code flushes cache and TLB entries in
swsusp_arch_resume(). But they are removed in Commit 44eeab67416711
(MIPS: Hibernation: Remove SMP TLB and cacheflushing code.). A cross-
CPU flush is surely unnecessary because all but the local CPU have
already been disabled. But a local flush (at least the TLB flush) is
needed. When we do hibernation on Loongson-3 with an E1000E NIC, it is
very easy to produce a kernel panic (kernel page fault, or unaligned
access). The root cause is E1000E driver use vzalloc_node() to allocate
pages, the stale TLB entries of the booting kernel will be misused by
the resumed target kernel.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/6643/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'sound/pci')
0 files changed, 0 insertions, 0 deletions