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author | Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de> | 2015-10-23 04:06:23 +0200 |
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committer | Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de> | 2015-10-23 04:06:23 +0200 |
commit | 3b3a015ad4ab1ad0cf707ccbaef1dbe965993a4a (patch) | |
tree | 2e9e3c9f86387bdad3df86b8c48d76665bb44a27 /sound/soc/au1x/Kconfig | |
parent | 15dfd0df63ce6847081d09b2bbd567cc0cc4eae1 (diff) | |
download | kernel_samsung_smdk4412-3b3a015ad4ab1ad0cf707ccbaef1dbe965993a4a.zip kernel_samsung_smdk4412-3b3a015ad4ab1ad0cf707ccbaef1dbe965993a4a.tar.gz kernel_samsung_smdk4412-3b3a015ad4ab1ad0cf707ccbaef1dbe965993a4a.tar.bz2 |
merged more uncritical stuff from 3.2.72
Diffstat (limited to 'sound/soc/au1x/Kconfig')
-rw-r--r-- | sound/soc/au1x/Kconfig | 30 |
1 files changed, 29 insertions, 1 deletions
diff --git a/sound/soc/au1x/Kconfig b/sound/soc/au1x/Kconfig index 4b67140..e908a81 100644 --- a/sound/soc/au1x/Kconfig +++ b/sound/soc/au1x/Kconfig @@ -3,7 +3,7 @@ ## config SND_SOC_AU1XPSC tristate "SoC Audio for Au1200/Au1250/Au1550" - depends on SOC_AU1200 || SOC_AU1550 + depends on MIPS_ALCHEMY help This option enables support for the Programmable Serial Controllers in AC97 and I2S mode, and the Descriptor-Based DMA @@ -18,10 +18,38 @@ config SND_SOC_AU1XPSC_AC97 select SND_AC97_CODEC select SND_SOC_AC97_BUS +## +## Au1000/1500/1100 DMA + AC97C/I2SC +## +config SND_SOC_AU1XAUDIO + tristate "SoC Audio for Au1000/Au1500/Au1100" + depends on MIPS_ALCHEMY + help + This is a driver set for the AC97 unit and the + old DMA controller as found on the Au1000/Au1500/Au1100 chips. + +config SND_SOC_AU1XAC97C + tristate + select AC97_BUS + select SND_AC97_CODEC + select SND_SOC_AC97_BUS + +config SND_SOC_AU1XI2SC + tristate + ## ## Boards ## +config SND_SOC_DB1000 + tristate "DB1000 Audio support" + depends on SND_SOC_AU1XAUDIO + select SND_SOC_AU1XAC97C + select SND_SOC_AC97_CODEC + help + Select this option to enable AC97 audio on the early DB1x00 series + of boards (DB1000/DB1500/DB1100). + config SND_SOC_DB1200 tristate "DB1200 AC97+I2S audio support" depends on SND_SOC_AU1XPSC |