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-rw-r--r--arch/x86/kernel/paravirt.c1
-rw-r--r--include/asm-x86/paravirt.h9
-rw-r--r--include/asm-x86/processor.h8
3 files changed, 18 insertions, 0 deletions
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 072c1a0..e7c17cc 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -390,6 +390,7 @@ struct pv_cpu_ops pv_cpu_ops = {
.irq_enable_syscall_ret = native_irq_enable_syscall_ret,
.iret = native_iret,
+ .swapgs = native_swapgs,
.set_iopl_mask = native_set_iopl_mask,
.io_delay = native_io_delay,
diff --git a/include/asm-x86/paravirt.h b/include/asm-x86/paravirt.h
index 7d1c126..e8fbf74 100644
--- a/include/asm-x86/paravirt.h
+++ b/include/asm-x86/paravirt.h
@@ -127,6 +127,8 @@ struct pv_cpu_ops {
void (*irq_enable_syscall_ret)(void);
void (*iret)(void);
+ void (*swapgs)(void);
+
struct pv_lazy_ops lazy_mode;
};
@@ -1228,6 +1230,13 @@ static inline unsigned long __raw_local_irq_save(void)
call *pv_cpu_ops+PV_CPU_read_cr0; \
pop %edx; pop %ecx
#else
+#define SWAPGS \
+ PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
+ PV_SAVE_REGS; \
+ call *pv_cpu_ops+PV_CPU_swapgs; \
+ PV_RESTORE_REGS \
+ )
+
#define GET_CR2_INTO_RCX \
call *pv_mmu_ops+PV_MMU_read_cr2; \
movq %rax, %rcx; \
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index e6fa06f..72740c6 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -435,6 +435,13 @@ static inline void native_load_sp0(struct tss_struct *tss,
#endif
}
+static inline void native_swapgs(void)
+{
+#ifdef CONFIG_X86_64
+ asm volatile("swapgs" ::: "memory");
+#endif
+}
+
#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
#else
@@ -456,6 +463,7 @@ static inline void load_sp0(struct tss_struct *tss,
}
#define set_iopl_mask native_set_iopl_mask
+#define SWAPGS swapgs
#endif /* CONFIG_PARAVIRT */
/*