diff options
Diffstat (limited to 'arch/arm/Kconfig')
| -rw-r--r-- | arch/arm/Kconfig | 89 |
1 files changed, 80 insertions, 9 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 17d179c..af7e74d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -4,6 +4,7 @@ config ARM select HAVE_AOUT select HAVE_DMA_API_DEBUG select HAVE_IDE + select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7) select HAVE_MEMBLOCK select RTC_LIB select SYS_SUPPORTS_APM_EMULATION @@ -37,6 +38,9 @@ config ARM Europe. There is an ARM Linux project with a web page at <http://www.arm.linux.org.uk/>. +config ARM_HAS_SG_CHAIN + bool + config HAVE_PWM bool @@ -110,7 +114,6 @@ config STACKTRACE_SUPPORT config HAVE_LATENCYTOP_SUPPORT bool - depends on !SMP default y config LOCKDEP_SUPPORT @@ -213,6 +216,9 @@ config ARM_PATCH_PHYS_VIRT_16BIT to allow physical memory down to a theoretical minimum of 64K boundaries. +config ARCH_HIBERNATION_POSSIBLE + def_bool y + source "init/Kconfig" source "kernel/Kconfig.freezer" @@ -761,19 +767,22 @@ config ARCH_S5PV210 help Samsung S5PV210/S5PC110 series based systems -config ARCH_EXYNOS4 - bool "Samsung EXYNOS4" +config ARCH_EXYNOS + bool "Samsung EXYNOS" select CPU_V7 - select ARCH_SPARSEMEM_ENABLE + select ARCH_FLATMEM_ENABLE select GENERIC_GPIO select HAVE_CLK + select CLKDEV_LOOKUP select ARCH_HAS_CPUFREQ select GENERIC_CLOCKEVENTS select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG + select ARCH_HAS_OPP + select PM_OPP if PM help - Samsung EXYNOS4 series based systems + Samsung EXYNOS series based systems config ARCH_SHARK bool "Shark" @@ -987,7 +996,7 @@ source "arch/arm/mach-s5pc100/Kconfig" source "arch/arm/mach-s5pv210/Kconfig" -source "arch/arm/mach-exynos4/Kconfig" +source "arch/arm/mach-exynos/Kconfig" source "arch/arm/mach-shmobile/Kconfig" @@ -1033,6 +1042,11 @@ config ARM_TIMER_SP804 source arch/arm/mm/Kconfig +config ARM_PLD_SIZE + int + default 64 if ARCH_EXYNOS5 + default 32 + config IWMMXT bool "Enable iWMMXt support" depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 @@ -1163,6 +1177,16 @@ config ARM_ERRATA_720789 tables. The workaround changes the TLB flushing routines to invalidate entries regardless of the ASID. +config ARM_ERRATA_720791 + bool "ARM errata: Dynamic high-level clock gating corrupts the Jazelle instruction stream" + depends on CPU_V7 + help + This option enables the workaround for the 720791 Cortex-A9 + (r1p0..r1p2) erratum. The Jazelle instruction stream may be + corrupted when dynamic high-level clock gating is enabled. + This workaround disables gating the Core clock when the Instruction + side is waiting for a Page Table Walk answer or linefill completion. + config PL310_ERRATA_727915 bool "Background Clean & Invalidate by Way operation can cause data corruption" depends on CACHE_L2X0 @@ -1234,6 +1258,30 @@ config ARM_ERRATA_754327 This workaround defines cpu_relax() as smp_mb(), preventing correctly written polling loops from denying visibility of updates to memory. +config ARM_ERRATA_761320 + bool "ARM errata: no direct eviction" + depends on CPU_V7 && SMP + help + This option enables the workaround for the 761320 Cortex-A9 erratum. + +config ARM_ERRATA_761171 + bool "ARM errata: disable store streaming of mode 3" + depends on CPU_V7 && SMP + help + This option enables the workaround for the 761171 Cortex-A15 erratum. + +config ARM_ERRATA_762974 + bool "ARM errata: disable l2 prefetch" + depends on CPU_V7 && SMP + help + This option enables the workaround for the 762964 Cortex-A15 erratum. + +config ARM_ERRATA_763722 + bool "ARM errata: disable store streaming of mode 2 and mode 3" + depends on CPU_V7 && SMP + help + This option enables the workaround for the 763722 Cortex-A15 erratum. + config ARM_ERRATA_764369 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed" depends on CPU_V7 && SMP @@ -1346,7 +1394,7 @@ config SMP depends on GENERIC_CLOCKEVENTS depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ - ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ + ARCH_EXYNOS || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP @@ -1433,7 +1481,7 @@ config LOCAL_TIMERS bool "Use local timer interrupts" depends on SMP default y - select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) + select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS_MCT) help Enable support for local timers on SMP platforms, rather then the legacy IPI broadcast method. Local timers allows the system @@ -1445,7 +1493,8 @@ source kernel/Kconfig.preempt config HZ int default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ - ARCH_S5PV210 || ARCH_EXYNOS4 + ARCH_S5PV210 || (ARCH_EXYNOS && !MACH_FPGA5410) + default 20 if MACH_FPGA5410 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER default AT91_TIMER_HZ if ARCH_AT91 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE @@ -1544,6 +1593,16 @@ config ARCH_SELECT_MEMORY_MODEL config HAVE_ARCH_PFN_VALID def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM +config ARCH_SKIP_SECONDARY_CALIBRATE + bool "Skip secondary CPU calibration" + depends on SMP + help + On some architectures, secondary cores shares clock with primiary + core and hence scale together. Hence secondary core lpj calibration + is not necessary and can be skipped to save considerable time. + + If unsure, say n. + config HIGHMEM bool "High Memory Support" depends on MMU @@ -1579,6 +1638,7 @@ config FORCE_MAX_ZONEORDER int "Maximum zone order" if ARCH_SHMOBILE range 11 64 if ARCH_SHMOBILE default "9" if SA1111 + default "12" if ARCH_EXYNOS default "11" help The kernel memory allocator divides physically contiguous memory @@ -1707,6 +1767,17 @@ config DEPRECATED_PARAM_STRUCT This was deprecated in 2001 and announced to live on for 5 years. Some old boot loaders still use this way. +config ARM_FLUSH_CONSOLE_ON_RESTART + bool "Force flush the console on restart" + help + If the console is locked while the system is rebooted, the messages + in the temporary logbuffer would not have propogated to all the + console drivers. This option forces the console lock to be + released if it failed to be acquired, which will cause all the + pending messages to be flushed. + +source "arch/arm/mvp/Kconfig" + endmenu menu "Boot options" |