1 files changed, 73 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/setup-fimd.c b/arch/arm/mach-exynos/setup-fimd.c
new file mode 100644
index 0000000..91bad86
--- /dev/null
+++ b/arch/arm/mach-exynos/setup-fimd.c
@@ -0,0 +1,73 @@
+/* linux/arch/arm/mach-exynos/setup-fimd.c
+ *
+ * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * Base Exynos4 FIMD configuration
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/fb.h>
+#include <linux/gpio.h>
+#include <linux/clk.h>
+
+#include <plat/fb.h>
+#include <plat/gpio-cfg.h>
+#include <plat/clock.h>
+
+#include <mach/regs-clock.h>
+#include <mach/map.h>
+
+void exynos4_fimd_cfg_gpios(unsigned int base, unsigned int nr,
+		unsigned int cfg, s5p_gpio_drvstr_t drvstr)
+{
+	s3c_gpio_cfgrange_nopull(base, nr, cfg);
+
+	for (; nr > 0; nr--, base++)
+		s5p_gpio_set_drvstr(base, drvstr);
+}
+
+int __init exynos4_fimd_setup_clock(struct device *dev, const char *bus_clk,
+		const char *parent, unsigned long clk_rate)
+{
+	struct clk *clk_parent;
+	struct clk *sclk;
+
+	sclk = clk_get(dev, bus_clk);
+	if (IS_ERR(sclk))
+		return PTR_ERR(sclk);
+
+	clk_parent = clk_get(NULL, parent);
+	if (IS_ERR(clk_parent)) {
+		clk_put(sclk);
+		return PTR_ERR(clk_parent);
+	}
+
+	if (clk_set_parent(sclk, clk_parent)) {
+		pr_err("Unable to set parent %s of clock %s.\n",
+				clk_parent->name, sclk->name);
+		clk_put(sclk);
+		clk_put(clk_parent);
+		return PTR_ERR(sclk);
+	}
+
+	if (!clk_rate)
+		clk_rate = 87000000UL;
+
+	if (clk_set_rate(sclk, clk_rate)) {
+		pr_err("%s rate change failed: %lu\n", sclk->name, clk_rate);
+		clk_put(sclk);
+		clk_put(clk_parent);
+		return PTR_ERR(sclk);
+	}
+
+	clk_put(sclk);
+	clk_put(clk_parent);
+
+	return 0;
+}