diff options
Diffstat (limited to 'arch/arm/mach-s3c2410/include/mach/regs-mem.h')
| -rw-r--r-- | arch/arm/mach-s3c2410/include/mach/regs-mem.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-mem.h b/arch/arm/mach-s3c2410/include/mach/regs-mem.h index e0c67b0..988a686 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-mem.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-mem.h @@ -145,8 +145,29 @@ #define S3C2410_BANKCON_Tacs_SHIFT (13) #define S3C2410_BANKCON_SRAM (0x0 << 15) +#define S3C2400_BANKCON_EDODRAM (0x2 << 15) #define S3C2410_BANKCON_SDRAM (0x3 << 15) +/* next bits only for EDO DRAM in 6,7 */ +#define S3C2400_BANKCON_EDO_Trcd1 (0x00 << 4) +#define S3C2400_BANKCON_EDO_Trcd2 (0x01 << 4) +#define S3C2400_BANKCON_EDO_Trcd3 (0x02 << 4) +#define S3C2400_BANKCON_EDO_Trcd4 (0x03 << 4) + +/* CAS pulse width */ +#define S3C2400_BANKCON_EDO_PULSE1 (0x00 << 3) +#define S3C2400_BANKCON_EDO_PULSE2 (0x01 << 3) + +/* CAS pre-charge */ +#define S3C2400_BANKCON_EDO_TCP1 (0x00 << 2) +#define S3C2400_BANKCON_EDO_TCP2 (0x01 << 2) + +/* control column address select */ +#define S3C2400_BANKCON_EDO_SCANb8 (0x00 << 0) +#define S3C2400_BANKCON_EDO_SCANb9 (0x01 << 0) +#define S3C2400_BANKCON_EDO_SCANb10 (0x02 << 0) +#define S3C2400_BANKCON_EDO_SCANb11 (0x03 << 0) + /* next bits only for SDRAM in 6,7 */ #define S3C2410_BANKCON_Trcd2 (0x00 << 2) #define S3C2410_BANKCON_Trcd3 (0x01 << 2) @@ -173,6 +194,12 @@ #define S3C2410_REFRESH_TRP_3clk (1<<20) #define S3C2410_REFRESH_TRP_4clk (2<<20) +#define S3C2400_REFRESH_DRAM_TRP_MASK (3<<20) +#define S3C2400_REFRESH_DRAM_TRP_1_5clk (0<<20) +#define S3C2400_REFRESH_DRAM_TRP_2_5clk (1<<20) +#define S3C2400_REFRESH_DRAM_TRP_3_5clk (2<<20) +#define S3C2400_REFRESH_DRAM_TRP_4_5clk (3<<20) + #define S3C2410_REFRESH_TSRC_MASK (3<<18) #define S3C2410_REFRESH_TSRC_4clk (0<<18) #define S3C2410_REFRESH_TSRC_5clk (1<<18) @@ -195,6 +222,7 @@ #define S3C2410_BANKSIZE_4M (0x5 << 0) #define S3C2410_BANKSIZE_2M (0x4 << 0) #define S3C2410_BANKSIZE_MASK (0x7 << 0) +#define S3C2400_BANKSIZE_MASK (0x4 << 0) #define S3C2410_BANKSIZE_SCLK_EN (1<<4) #define S3C2410_BANKSIZE_SCKE_EN (1<<5) #define S3C2410_BANKSIZE_BURST (1<<7) |