diff options
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r-- | arch/arm/mach-shmobile/board-kota2.c | 557 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/intc.h | 246 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h | 21 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/sdhi.h | 16 |
4 files changed, 840 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c new file mode 100644 index 0000000..f44150b --- /dev/null +++ b/arch/arm/mach-shmobile/board-kota2.c @@ -0,0 +1,557 @@ +/* + * kota2 board support + * + * Copyright (C) 2011 Renesas Solutions Corp. + * Copyright (C) 2011 Magnus Damm + * Copyright (C) 2010 Takashi Yoshii <yoshii.takashi.zj@renesas.com> + * Copyright (C) 2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/platform_device.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/smsc911x.h> +#include <linux/gpio.h> +#include <linux/input.h> +#include <linux/input/sh_keysc.h> +#include <linux/gpio_keys.h> +#include <linux/leds.h> +#include <linux/platform_data/leds-renesas-tpu.h> +#include <linux/mmc/host.h> +#include <linux/mmc/sh_mmcif.h> +#include <linux/mfd/tmio.h> +#include <linux/mmc/sh_mobile_sdhi.h> +#include <mach/hardware.h> +#include <mach/sh73a0.h> +#include <mach/common.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/time.h> +#include <asm/hardware/gic.h> +#include <asm/hardware/cache-l2x0.h> +#include <asm/traps.h> + +/* SMSC 9220 */ +static struct resource smsc9220_resources[] = { + [0] = { + .start = 0x14000000, /* CS5A */ + .end = 0x140000ff, /* A1->A7 */ + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */ + .flags = IORESOURCE_IRQ, + }, +}; + +static struct smsc911x_platform_config smsc9220_platdata = { + .flags = SMSC911X_USE_32BIT, /* 32-bit SW on 16-bit HW bus */ + .phy_interface = PHY_INTERFACE_MODE_MII, + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, +}; + +static struct platform_device eth_device = { + .name = "smsc911x", + .id = 0, + .dev = { + .platform_data = &smsc9220_platdata, + }, + .resource = smsc9220_resources, + .num_resources = ARRAY_SIZE(smsc9220_resources), +}; + +/* KEYSC */ +static struct sh_keysc_info keysc_platdata = { + .mode = SH_KEYSC_MODE_6, + .scan_timing = 3, + .delay = 100, + .keycodes = { + KEY_NUMERIC_STAR, KEY_NUMERIC_0, KEY_NUMERIC_POUND, + 0, 0, 0, 0, 0, + KEY_NUMERIC_7, KEY_NUMERIC_8, KEY_NUMERIC_9, + 0, KEY_DOWN, 0, 0, 0, + KEY_NUMERIC_4, KEY_NUMERIC_5, KEY_NUMERIC_6, + KEY_LEFT, KEY_ENTER, KEY_RIGHT, 0, 0, + KEY_NUMERIC_1, KEY_NUMERIC_2, KEY_NUMERIC_3, + 0, KEY_UP, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + }, +}; + +static struct resource keysc_resources[] = { + [0] = { + .name = "KEYSC", + .start = 0xe61b0000, + .end = 0xe61b0098 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = gic_spi(71), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device keysc_device = { + .name = "sh_keysc", + .id = 0, + .num_resources = ARRAY_SIZE(keysc_resources), + .resource = keysc_resources, + .dev = { + .platform_data = &keysc_platdata, + }, +}; + +/* GPIO KEY */ +#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } + +static struct gpio_keys_button gpio_buttons[] = { + GPIO_KEY(KEY_VOLUMEUP, GPIO_PORT56, "+"), /* S2: VOL+ [IRQ9] */ + GPIO_KEY(KEY_VOLUMEDOWN, GPIO_PORT54, "-"), /* S3: VOL- [IRQ10] */ + GPIO_KEY(KEY_MENU, GPIO_PORT27, "Menu"), /* S4: MENU [IRQ30] */ + GPIO_KEY(KEY_HOMEPAGE, GPIO_PORT26, "Home"), /* S5: HOME [IRQ31] */ + GPIO_KEY(KEY_BACK, GPIO_PORT11, "Back"), /* S6: BACK [IRQ0] */ + GPIO_KEY(KEY_PHONE, GPIO_PORT238, "Tel"), /* S7: TEL [IRQ11] */ + GPIO_KEY(KEY_POWER, GPIO_PORT239, "C1"), /* S8: CAM [IRQ13] */ + GPIO_KEY(KEY_MAIL, GPIO_PORT224, "Mail"), /* S9: MAIL [IRQ3] */ + /* Omitted button "C3?": GPIO_PORT223 - S10: CUST [IRQ8] */ + GPIO_KEY(KEY_CAMERA, GPIO_PORT164, "C2"), /* S11: CAM_HALF [IRQ25] */ + /* Omitted button "?": GPIO_PORT152 - S12: CAM_FULL [No IRQ] */ +}; + +static struct gpio_keys_platform_data gpio_key_info = { + .buttons = gpio_buttons, + .nbuttons = ARRAY_SIZE(gpio_buttons), + .poll_interval = 250, /* polled for now */ +}; + +static struct platform_device gpio_keys_device = { + .name = "gpio-keys-polled", /* polled for now */ + .id = -1, + .dev = { + .platform_data = &gpio_key_info, + }, +}; + +/* GPIO LED */ +#define GPIO_LED(n, g) { .name = n, .gpio = g } + +static struct gpio_led gpio_leds[] = { + GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */ + GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */ + GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */ +}; + +static struct gpio_led_platform_data gpio_leds_info = { + .leds = gpio_leds, + .num_leds = ARRAY_SIZE(gpio_leds), +}; + +static struct platform_device gpio_leds_device = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &gpio_leds_info, + }, +}; + +/* TPU LED */ +static struct led_renesas_tpu_config led_renesas_tpu12_pdata = { + .name = "V2513", + .pin_gpio_fn = GPIO_FN_TPU1TO2, + .pin_gpio = GPIO_PORT153, + .channel_offset = 0x90, + .timer_bit = 2, + .max_brightness = 1000, +}; + +static struct resource tpu12_resources[] = { + [0] = { + .name = "TPU12", + .start = 0xe6610090, + .end = 0xe66100b5, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device leds_tpu12_device = { + .name = "leds-renesas-tpu", + .id = 12, + .dev = { + .platform_data = &led_renesas_tpu12_pdata, + }, + .num_resources = ARRAY_SIZE(tpu12_resources), + .resource = tpu12_resources, +}; + +static struct led_renesas_tpu_config led_renesas_tpu41_pdata = { + .name = "V2514", + .pin_gpio_fn = GPIO_FN_TPU4TO1, + .pin_gpio = GPIO_PORT199, + .channel_offset = 0x50, + .timer_bit = 1, + .max_brightness = 1000, +}; + +static struct resource tpu41_resources[] = { + [0] = { + .name = "TPU41", + .start = 0xe6640050, + .end = 0xe6640075, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device leds_tpu41_device = { + .name = "leds-renesas-tpu", + .id = 41, + .dev = { + .platform_data = &led_renesas_tpu41_pdata, + }, + .num_resources = ARRAY_SIZE(tpu41_resources), + .resource = tpu41_resources, +}; + +static struct led_renesas_tpu_config led_renesas_tpu21_pdata = { + .name = "V2515", + .pin_gpio_fn = GPIO_FN_TPU2TO1, + .pin_gpio = GPIO_PORT197, + .channel_offset = 0x50, + .timer_bit = 1, + .max_brightness = 1000, +}; + +static struct resource tpu21_resources[] = { + [0] = { + .name = "TPU21", + .start = 0xe6620050, + .end = 0xe6620075, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device leds_tpu21_device = { + .name = "leds-renesas-tpu", + .id = 21, + .dev = { + .platform_data = &led_renesas_tpu21_pdata, + }, + .num_resources = ARRAY_SIZE(tpu21_resources), + .resource = tpu21_resources, +}; + +static struct led_renesas_tpu_config led_renesas_tpu30_pdata = { + .name = "KEYLED", + .pin_gpio_fn = GPIO_FN_TPU3TO0, + .pin_gpio = GPIO_PORT163, + .channel_offset = 0x10, + .timer_bit = 0, + .max_brightness = 1000, +}; + +static struct resource tpu30_resources[] = { + [0] = { + .name = "TPU30", + .start = 0xe6630010, + .end = 0xe6630035, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device leds_tpu30_device = { + .name = "leds-renesas-tpu", + .id = 30, + .dev = { + .platform_data = &led_renesas_tpu30_pdata, + }, + .num_resources = ARRAY_SIZE(tpu30_resources), + .resource = tpu30_resources, +}; + +/* MMCIF */ +static struct resource mmcif_resources[] = { + [0] = { + .name = "MMCIF", + .start = 0xe6bd0000, + .end = 0xe6bd00ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = gic_spi(140), + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = gic_spi(141), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct sh_mmcif_plat_data mmcif_info = { + .ocr = MMC_VDD_165_195, + .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, +}; + +static struct platform_device mmcif_device = { + .name = "sh_mmcif", + .id = 0, + .dev = { + .platform_data = &mmcif_info, + }, + .num_resources = ARRAY_SIZE(mmcif_resources), + .resource = mmcif_resources, +}; + +/* SDHI0 */ +static struct sh_mobile_sdhi_info sdhi0_info = { + .tmio_caps = MMC_CAP_SD_HIGHSPEED, + .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, +}; + +static struct resource sdhi0_resources[] = { + [0] = { + .name = "SDHI0", + .start = 0xee100000, + .end = 0xee1000ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = gic_spi(83), + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = gic_spi(84), + .flags = IORESOURCE_IRQ, + }, + [3] = { + .start = gic_spi(85), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device sdhi0_device = { + .name = "sh_mobile_sdhi", + .id = 0, + .num_resources = ARRAY_SIZE(sdhi0_resources), + .resource = sdhi0_resources, + .dev = { + .platform_data = &sdhi0_info, + }, +}; + +/* SDHI1 */ +static struct sh_mobile_sdhi_info sdhi1_info = { + .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, + .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, +}; + +static struct resource sdhi1_resources[] = { + [0] = { + .name = "SDHI1", + .start = 0xee120000, + .end = 0xee1200ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = gic_spi(87), + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = gic_spi(88), + .flags = IORESOURCE_IRQ, + }, + [3] = { + .start = gic_spi(89), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device sdhi1_device = { + .name = "sh_mobile_sdhi", + .id = 1, + .num_resources = ARRAY_SIZE(sdhi1_resources), + .resource = sdhi1_resources, + .dev = { + .platform_data = &sdhi1_info, + }, +}; + +static struct platform_device *kota2_devices[] __initdata = { + ð_device, + &keysc_device, + &gpio_keys_device, + &gpio_leds_device, + &leds_tpu12_device, + &leds_tpu41_device, + &leds_tpu21_device, + &leds_tpu30_device, + &mmcif_device, + &sdhi0_device, + &sdhi1_device, +}; + +static struct map_desc kota2_io_desc[] __initdata = { + /* create a 1:1 entity map for 0xe6xxxxxx + * used by CPGA, INTC and PFC. + */ + { + .virtual = 0xe6000000, + .pfn = __phys_to_pfn(0xe6000000), + .length = 256 << 20, + .type = MT_DEVICE_NONSHARED + }, +}; + +static void __init kota2_map_io(void) +{ + iotable_init(kota2_io_desc, ARRAY_SIZE(kota2_io_desc)); + + /* setup early devices and console here as well */ + sh73a0_add_early_devices(); + shmobile_setup_console(); +} + +static void __init kota2_init(void) +{ + sh73a0_pinmux_init(); + + /* SCIFA2 (UART2) */ + gpio_request(GPIO_FN_SCIFA2_TXD1, NULL); + gpio_request(GPIO_FN_SCIFA2_RXD1, NULL); + gpio_request(GPIO_FN_SCIFA2_RTS1_, NULL); + gpio_request(GPIO_FN_SCIFA2_CTS1_, NULL); + + /* SCIFA4 (UART1) */ + gpio_request(GPIO_FN_SCIFA4_TXD, NULL); + gpio_request(GPIO_FN_SCIFA4_RXD, NULL); + gpio_request(GPIO_FN_SCIFA4_RTS_, NULL); + gpio_request(GPIO_FN_SCIFA4_CTS_, NULL); + + /* SMSC911X */ + gpio_request(GPIO_FN_D0_NAF0, NULL); + gpio_request(GPIO_FN_D1_NAF1, NULL); + gpio_request(GPIO_FN_D2_NAF2, NULL); + gpio_request(GPIO_FN_D3_NAF3, NULL); + gpio_request(GPIO_FN_D4_NAF4, NULL); + gpio_request(GPIO_FN_D5_NAF5, NULL); + gpio_request(GPIO_FN_D6_NAF6, NULL); + gpio_request(GPIO_FN_D7_NAF7, NULL); + gpio_request(GPIO_FN_D8_NAF8, NULL); + gpio_request(GPIO_FN_D9_NAF9, NULL); + gpio_request(GPIO_FN_D10_NAF10, NULL); + gpio_request(GPIO_FN_D11_NAF11, NULL); + gpio_request(GPIO_FN_D12_NAF12, NULL); + gpio_request(GPIO_FN_D13_NAF13, NULL); + gpio_request(GPIO_FN_D14_NAF14, NULL); + gpio_request(GPIO_FN_D15_NAF15, NULL); + gpio_request(GPIO_FN_CS5A_, NULL); + gpio_request(GPIO_FN_WE0__FWE, NULL); + gpio_request(GPIO_PORT144, NULL); /* PINTA2 */ + gpio_direction_input(GPIO_PORT144); + gpio_request(GPIO_PORT145, NULL); /* RESET */ + gpio_direction_output(GPIO_PORT145, 1); + + /* KEYSC */ + gpio_request(GPIO_FN_KEYIN0_PU, NULL); + gpio_request(GPIO_FN_KEYIN1_PU, NULL); + gpio_request(GPIO_FN_KEYIN2_PU, NULL); + gpio_request(GPIO_FN_KEYIN3_PU, NULL); + gpio_request(GPIO_FN_KEYIN4_PU, NULL); + gpio_request(GPIO_FN_KEYIN5_PU, NULL); + gpio_request(GPIO_FN_KEYIN6_PU, NULL); + gpio_request(GPIO_FN_KEYIN7_PU, NULL); + gpio_request(GPIO_FN_KEYOUT0, NULL); + gpio_request(GPIO_FN_KEYOUT1, NULL); + gpio_request(GPIO_FN_KEYOUT2, NULL); + gpio_request(GPIO_FN_KEYOUT3, NULL); + gpio_request(GPIO_FN_KEYOUT4, NULL); + gpio_request(GPIO_FN_KEYOUT5, NULL); + gpio_request(GPIO_FN_PORT59_KEYOUT6, NULL); + gpio_request(GPIO_FN_PORT58_KEYOUT7, NULL); + gpio_request(GPIO_FN_KEYOUT8, NULL); + + /* MMCIF */ + gpio_request(GPIO_FN_MMCCLK0, NULL); + gpio_request(GPIO_FN_MMCD0_0, NULL); + gpio_request(GPIO_FN_MMCD0_1, NULL); + gpio_request(GPIO_FN_MMCD0_2, NULL); + gpio_request(GPIO_FN_MMCD0_3, NULL); + gpio_request(GPIO_FN_MMCD0_4, NULL); + gpio_request(GPIO_FN_MMCD0_5, NULL); + gpio_request(GPIO_FN_MMCD0_6, NULL); + gpio_request(GPIO_FN_MMCD0_7, NULL); + gpio_request(GPIO_FN_MMCCMD0, NULL); + gpio_request(GPIO_PORT208, NULL); /* Reset */ + gpio_direction_output(GPIO_PORT208, 1); + + /* SDHI0 (microSD) */ + gpio_request(GPIO_FN_SDHICD0_PU, NULL); + gpio_request(GPIO_FN_SDHICMD0_PU, NULL); + gpio_request(GPIO_FN_SDHICLK0, NULL); + gpio_request(GPIO_FN_SDHID0_3_PU, NULL); + gpio_request(GPIO_FN_SDHID0_2_PU, NULL); + gpio_request(GPIO_FN_SDHID0_1_PU, NULL); + gpio_request(GPIO_FN_SDHID0_0_PU, NULL); + + /* SCIFB (BT) */ + gpio_request(GPIO_FN_PORT159_SCIFB_SCK, NULL); + gpio_request(GPIO_FN_PORT160_SCIFB_TXD, NULL); + gpio_request(GPIO_FN_PORT161_SCIFB_CTS_, NULL); + gpio_request(GPIO_FN_PORT162_SCIFB_RXD, NULL); + gpio_request(GPIO_FN_PORT163_SCIFB_RTS_, NULL); + + /* SDHI1 (BCM4330) */ + gpio_request(GPIO_FN_SDHICLK1, NULL); + gpio_request(GPIO_FN_SDHICMD1_PU, NULL); + gpio_request(GPIO_FN_SDHID1_3_PU, NULL); + gpio_request(GPIO_FN_SDHID1_2_PU, NULL); + gpio_request(GPIO_FN_SDHID1_1_PU, NULL); + gpio_request(GPIO_FN_SDHID1_0_PU, NULL); + +#ifdef CONFIG_CACHE_L2X0 + /* Early BRESP enable, Shared attribute override enable, 64K*8way */ + l2x0_init(__io(0xf0100000), 0x40460000, 0x82000fff); +#endif + sh73a0_add_standard_devices(); + platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices)); +} + +static void __init kota2_timer_init(void) +{ + sh73a0_clock_init(); + shmobile_timer.init(); + return; +} + +struct sys_timer kota2_timer = { + .init = kota2_timer_init, +}; + +MACHINE_START(KOTA2, "kota2") + .map_io = kota2_map_io, + .nr_irqs = NR_IRQS_LEGACY, + .init_irq = sh73a0_init_irq, + .handle_irq = shmobile_handle_irq_gic, + .init_machine = kota2_init, + .timer = &kota2_timer, +MACHINE_END diff --git a/arch/arm/mach-shmobile/include/mach/intc.h b/arch/arm/mach-shmobile/include/mach/intc.h new file mode 100644 index 0000000..8b22258 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/intc.h @@ -0,0 +1,246 @@ +#ifndef __ASM_MACH_INTC_H +#define __ASM_MACH_INTC_H +#include <linux/sh_intc.h> + +#define INTC_IRQ_PINS_ENUM_16L(p) \ + p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \ + p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7, \ + p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \ + p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 + +#define INTC_IRQ_PINS_ENUM_16H(p) \ + p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \ + p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23, \ + p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \ + p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 + +#define INTC_IRQ_PINS_VECT_16L(p, vect) \ + vect(p ## _IRQ0, 0x0200), vect(p ## _IRQ1, 0x0220), \ + vect(p ## _IRQ2, 0x0240), vect(p ## _IRQ3, 0x0260), \ + vect(p ## _IRQ4, 0x0280), vect(p ## _IRQ5, 0x02a0), \ + vect(p ## _IRQ6, 0x02c0), vect(p ## _IRQ7, 0x02e0), \ + vect(p ## _IRQ8, 0x0300), vect(p ## _IRQ9, 0x0320), \ + vect(p ## _IRQ10, 0x0340), vect(p ## _IRQ11, 0x0360), \ + vect(p ## _IRQ12, 0x0380), vect(p ## _IRQ13, 0x03a0), \ + vect(p ## _IRQ14, 0x03c0), vect(p ## _IRQ15, 0x03e0) + +#define INTC_IRQ_PINS_VECT_16H(p, vect) \ + vect(p ## _IRQ16, 0x3200), vect(p ## _IRQ17, 0x3220), \ + vect(p ## _IRQ18, 0x3240), vect(p ## _IRQ19, 0x3260), \ + vect(p ## _IRQ20, 0x3280), vect(p ## _IRQ21, 0x32a0), \ + vect(p ## _IRQ22, 0x32c0), vect(p ## _IRQ23, 0x32e0), \ + vect(p ## _IRQ24, 0x3300), vect(p ## _IRQ25, 0x3320), \ + vect(p ## _IRQ26, 0x3340), vect(p ## _IRQ27, 0x3360), \ + vect(p ## _IRQ28, 0x3380), vect(p ## _IRQ29, 0x33a0), \ + vect(p ## _IRQ30, 0x33c0), vect(p ## _IRQ31, 0x33e0) + +#define INTC_IRQ_PINS_MASK_16L(p, base) \ + { base + 0x40, base + 0x60, 8, /* INTMSK00A / INTMSKCLR00A */ \ + { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \ + p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \ + { base + 0x44, base + 0x64, 8, /* INTMSK10A / INTMSKCLR10A */ \ + { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \ + p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } } + +#define INTC_IRQ_PINS_MASK_16H(p, base) \ + { base + 0x48, base + 0x68, 8, /* INTMSK20A / INTMSKCLR20A */ \ + { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \ + p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \ + { base + 0x4c, base + 0x6c, 8, /* INTMSK30A / INTMSKCLR30A */ \ + { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \ + p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } } + +#define INTC_IRQ_PINS_PRIO_16L(p, base) \ + { base + 0x10, 0, 32, 4, /* INTPRI00A */ \ + { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \ + p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \ + { base + 0x14, 0, 32, 4, /* INTPRI10A */ \ + { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \ + p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } } + +#define INTC_IRQ_PINS_PRIO_16H(p, base) \ + { base + 0x18, 0, 32, 4, /* INTPRI20A */ \ + { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \ + p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \ + { base + 0x1c, 0, 32, 4, /* INTPRI30A */ \ + { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \ + p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } } + +#define INTC_IRQ_PINS_SENSE_16L(p, base) \ + { base + 0x00, 32, 4, /* ICR1A */ \ + { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \ + p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \ + { base + 0x04, 32, 4, /* ICR2A */ \ + { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \ + p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } } + +#define INTC_IRQ_PINS_SENSE_16H(p, base) \ + { base + 0x08, 32, 4, /* ICR3A */ \ + { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \ + p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \ + { base + 0x0c, 32, 4, /* ICR4A */ \ + { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \ + p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } } + +#define INTC_IRQ_PINS_ACK_16L(p, base) \ + { base + 0x20, 0, 8, /* INTREQ00A */ \ + { p ## _IRQ0, p ## _IRQ1, p ## _IRQ2, p ## _IRQ3, \ + p ## _IRQ4, p ## _IRQ5, p ## _IRQ6, p ## _IRQ7 } }, \ + { base + 0x24, 0, 8, /* INTREQ10A */ \ + { p ## _IRQ8, p ## _IRQ9, p ## _IRQ10, p ## _IRQ11, \ + p ## _IRQ12, p ## _IRQ13, p ## _IRQ14, p ## _IRQ15 } } + +#define INTC_IRQ_PINS_ACK_16H(p, base) \ + { base + 0x28, 0, 8, /* INTREQ20A */ \ + { p ## _IRQ16, p ## _IRQ17, p ## _IRQ18, p ## _IRQ19, \ + p ## _IRQ20, p ## _IRQ21, p ## _IRQ22, p ## _IRQ23 } }, \ + { base + 0x2c, 0, 8, /* INTREQ30A */ \ + { p ## _IRQ24, p ## _IRQ25, p ## _IRQ26, p ## _IRQ27, \ + p ## _IRQ28, p ## _IRQ29, p ## _IRQ30, p ## _IRQ31 } } + +#define INTC_IRQ_PINS_16(p, base, vect, str) \ + \ +static struct resource p ## _resources[] __initdata = { \ + [0] = { \ + .start = base, \ + .end = base + 0x64, \ + .flags = IORESOURCE_MEM, \ + }, \ +}; \ + \ +enum { \ + p ## _UNUSED = 0, \ + INTC_IRQ_PINS_ENUM_16L(p), \ +}; \ + \ +static struct intc_vect p ## _vectors[] __initdata = { \ + INTC_IRQ_PINS_VECT_16L(p, vect), \ +}; \ + \ +static struct intc_mask_reg p ## _mask_registers[] __initdata = { \ + INTC_IRQ_PINS_MASK_16L(p, base), \ +}; \ + \ +static struct intc_prio_reg p ## _prio_registers[] __initdata = { \ + INTC_IRQ_PINS_PRIO_16L(p, base), \ +}; \ + \ +static struct intc_sense_reg p ## _sense_registers[] __initdata = { \ + INTC_IRQ_PINS_SENSE_16L(p, base), \ +}; \ + \ +static struct intc_mask_reg p ## _ack_registers[] __initdata = { \ + INTC_IRQ_PINS_ACK_16L(p, base), \ +}; \ + \ +static struct intc_desc p ## _desc __initdata = { \ + .name = str, \ + .resource = p ## _resources, \ + .num_resources = ARRAY_SIZE(p ## _resources), \ + .hw = INTC_HW_DESC(p ## _vectors, NULL, \ + p ## _mask_registers, p ## _prio_registers, \ + p ## _sense_registers, p ## _ack_registers) \ +} + +#define INTC_IRQ_PINS_32(p, base, vect, str) \ + \ +static struct resource p ## _resources[] __initdata = { \ + [0] = { \ + .start = base, \ + .end = base + 0x6c, \ + .flags = IORESOURCE_MEM, \ + }, \ +}; \ + \ +enum { \ + p ## _UNUSED = 0, \ + INTC_IRQ_PINS_ENUM_16L(p), \ + INTC_IRQ_PINS_ENUM_16H(p), \ +}; \ + \ +static struct intc_vect p ## _vectors[] __initdata = { \ + INTC_IRQ_PINS_VECT_16L(p, vect), \ + INTC_IRQ_PINS_VECT_16H(p, vect), \ +}; \ + \ +static struct intc_mask_reg p ## _mask_registers[] __initdata = { \ + INTC_IRQ_PINS_MASK_16L(p, base), \ + INTC_IRQ_PINS_MASK_16H(p, base), \ +}; \ + \ +static struct intc_prio_reg p ## _prio_registers[] __initdata = { \ + INTC_IRQ_PINS_PRIO_16L(p, base), \ + INTC_IRQ_PINS_PRIO_16H(p, base), \ +}; \ + \ +static struct intc_sense_reg p ## _sense_registers[] __initdata = { \ + INTC_IRQ_PINS_SENSE_16L(p, base), \ + INTC_IRQ_PINS_SENSE_16H(p, base), \ +}; \ + \ +static struct intc_mask_reg p ## _ack_registers[] __initdata = { \ + INTC_IRQ_PINS_ACK_16L(p, base), \ + INTC_IRQ_PINS_ACK_16H(p, base), \ +}; \ + \ +static struct intc_desc p ## _desc __initdata = { \ + .name = str, \ + .resource = p ## _resources, \ + .num_resources = ARRAY_SIZE(p ## _resources), \ + .hw = INTC_HW_DESC(p ## _vectors, NULL, \ + p ## _mask_registers, p ## _prio_registers, \ + p ## _sense_registers, p ## _ack_registers) \ +} + +#define INTC_PINT_E_EMPTY +#define INTC_PINT_E_NONE 0, 0, 0, 0, 0, 0, 0, 0, +#define INTC_PINT_E(p) \ + PINT ## p ## 0, PINT ## p ## 1, PINT ## p ## 2, PINT ## p ## 3, \ + PINT ## p ## 4, PINT ## p ## 5, PINT ## p ## 6, PINT ## p ## 7, + +#define INTC_PINT_V_NONE +#define INTC_PINT_V(p, vect) \ + vect(PINT ## p ## 0, 0), vect(PINT ## p ## 1, 1), \ + vect(PINT ## p ## 2, 2), vect(PINT ## p ## 3, 3), \ + vect(PINT ## p ## 4, 4), vect(PINT ## p ## 5, 5), \ + vect(PINT ## p ## 6, 6), vect(PINT ## p ## 7, 7), + +#define INTC_PINT(p, mask_reg, sense_base, str, \ + enums_1, enums_2, enums_3, enums_4, \ + vect_1, vect_2, vect_3, vect_4, \ + mask_a, mask_b, mask_c, mask_d, \ + sense_a, sense_b, sense_c, sense_d) \ + \ +enum { \ + PINT ## p ## _UNUSED = 0, \ + enums_1 enums_2 enums_3 enums_4 \ +}; \ + \ +static struct intc_vect p ## _vectors[] __initdata = { \ + vect_1 vect_2 vect_3 vect_4 \ +}; \ + \ +static struct intc_mask_reg p ## _mask_registers[] __initdata = { \ + { mask_reg, 0, 32, /* PINTER */ \ + { mask_a mask_b mask_c mask_d } } \ +}; \ + \ +static struct intc_sense_reg p ## _sense_registers[] __initdata = { \ + { sense_base + 0x00, 16, 2, /* PINTCR */ \ + { sense_a } }, \ + { sense_base + 0x04, 16, 2, /* PINTCR */ \ + { sense_b } }, \ + { sense_base + 0x08, 16, 2, /* PINTCR */ \ + { sense_c } }, \ + { sense_base + 0x0c, 16, 2, /* PINTCR */ \ + { sense_d } }, \ +}; \ + \ +static struct intc_desc p ## _desc __initdata = { \ + .name = str, \ + .hw = INTC_HW_DESC(p ## _vectors, NULL, \ + p ## _mask_registers, NULL, \ + p ## _sense_registers, NULL), \ +} + +#endif /* __ASM_MACH_INTC_H */ diff --git a/arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h b/arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h new file mode 100644 index 0000000..4a81b01 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h @@ -0,0 +1,21 @@ +#ifndef SDHI_SH7372_H +#define SDHI_SH7372_H + +#define SDGENCNTA 0xfe40009c + +/* The countdown of SDGENCNTA is controlled by + * ZB3D2CLK which runs at 149.5MHz. + * That is 149.5ticks/us. Approximate this as 150ticks/us. + */ +static void udelay(int us) +{ + __raw_writel(us * 150, SDGENCNTA); + while(__raw_readl(SDGENCNTA)) ; +} + +static void msleep(int ms) +{ + udelay(ms * 1000); +} + +#endif diff --git a/arch/arm/mach-shmobile/include/mach/sdhi.h b/arch/arm/mach-shmobile/include/mach/sdhi.h new file mode 100644 index 0000000..0ec9e69 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/sdhi.h @@ -0,0 +1,16 @@ +#ifndef SDHI_H +#define SDHI_H + +/************************************************** + * + * CPU specific settings + * + **************************************************/ + +#ifdef CONFIG_ARCH_SH7372 +#include "mach/sdhi-sh7372.h" +#else +#error "unsupported CPU." +#endif + +#endif /* SDHI_H */ |