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-rw-r--r--arch/m68k/include/asm/atariints.h2
-rw-r--r--arch/m68k/include/asm/bitops_mm.h102
-rw-r--r--arch/m68k/include/asm/bitops_no.h32
-rw-r--r--arch/m68k/include/asm/bootstd.h2
-rw-r--r--arch/m68k/include/asm/commproc.h4
-rw-r--r--arch/m68k/include/asm/delay_no.h2
-rw-r--r--arch/m68k/include/asm/gpio.h2
-rw-r--r--arch/m68k/include/asm/m520xsim.h2
-rw-r--r--arch/m68k/include/asm/m523xsim.h2
-rw-r--r--arch/m68k/include/asm/m527xsim.h2
-rw-r--r--arch/m68k/include/asm/m5307sim.h2
-rw-r--r--arch/m68k/include/asm/m5407sim.h2
-rw-r--r--arch/m68k/include/asm/m68360_quicc.h2
-rw-r--r--arch/m68k/include/asm/mac_oss.h2
-rw-r--r--arch/m68k/include/asm/mac_via.h2
-rw-r--r--arch/m68k/include/asm/macintosh.h2
-rw-r--r--arch/m68k/include/asm/mcftimer.h2
-rw-r--r--arch/m68k/include/asm/types.h9
-rw-r--r--arch/m68k/include/asm/unistd.h6
19 files changed, 92 insertions, 89 deletions
diff --git a/arch/m68k/include/asm/atariints.h b/arch/m68k/include/asm/atariints.h
index f597892..656bbbf 100644
--- a/arch/m68k/include/asm/atariints.h
+++ b/arch/m68k/include/asm/atariints.h
@@ -146,7 +146,7 @@ static inline void clear_mfp_bit( unsigned irq, int type )
/*
* {en,dis}able_irq have the usual semantics of temporary blocking the
- * interrupt, but not loosing requests that happen between disabling and
+ * interrupt, but not losing requests that happen between disabling and
* enabling. This is done with the MFP mask registers.
*/
diff --git a/arch/m68k/include/asm/bitops_mm.h b/arch/m68k/include/asm/bitops_mm.h
index b4ecdaa..9d69f6e 100644
--- a/arch/m68k/include/asm/bitops_mm.h
+++ b/arch/m68k/include/asm/bitops_mm.h
@@ -325,58 +325,45 @@ static inline int __fls(int x)
#include <asm-generic/bitops/hweight.h>
#include <asm-generic/bitops/lock.h>
-/* Bitmap functions for the minix filesystem */
+/* Bitmap functions for the little endian bitmap. */
-static inline int minix_find_first_zero_bit(const void *vaddr, unsigned size)
+static inline void __set_bit_le(int nr, void *addr)
{
- const unsigned short *p = vaddr, *addr = vaddr;
- int res;
- unsigned short num;
-
- if (!size)
- return 0;
-
- size = (size >> 4) + ((size & 15) > 0);
- while (*p++ == 0xffff)
- {
- if (--size == 0)
- return (p - addr) << 4;
- }
+ __set_bit(nr ^ 24, addr);
+}
- num = ~*--p;
- __asm__ __volatile__ ("bfffo %1{#16,#16},%0"
- : "=d" (res) : "d" (num & -num));
- return ((p - addr) << 4) + (res ^ 31);
+static inline void __clear_bit_le(int nr, void *addr)
+{
+ __clear_bit(nr ^ 24, addr);
}
-#define minix_test_and_set_bit(nr, addr) __test_and_set_bit((nr) ^ 16, (unsigned long *)(addr))
-#define minix_set_bit(nr,addr) __set_bit((nr) ^ 16, (unsigned long *)(addr))
-#define minix_test_and_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 16, (unsigned long *)(addr))
+static inline int __test_and_set_bit_le(int nr, void *addr)
+{
+ return __test_and_set_bit(nr ^ 24, addr);
+}
-static inline int minix_test_bit(int nr, const void *vaddr)
+static inline int test_and_set_bit_le(int nr, void *addr)
{
- const unsigned short *p = vaddr;
- return (p[nr >> 4] & (1U << (nr & 15))) != 0;
+ return test_and_set_bit(nr ^ 24, addr);
}
-/* Bitmap functions for the ext2 filesystem. */
+static inline int __test_and_clear_bit_le(int nr, void *addr)
+{
+ return __test_and_clear_bit(nr ^ 24, addr);
+}
-#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 24, (unsigned long *)(addr))
-#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 24, (unsigned long *)(addr))
-#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr))
-#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr))
-#define ext2_find_next_zero_bit(addr, size, offset) \
- generic_find_next_zero_le_bit((unsigned long *)addr, size, offset)
-#define ext2_find_next_bit(addr, size, offset) \
- generic_find_next_le_bit((unsigned long *)addr, size, offset)
+static inline int test_and_clear_bit_le(int nr, void *addr)
+{
+ return test_and_clear_bit(nr ^ 24, addr);
+}
-static inline int ext2_test_bit(int nr, const void *vaddr)
+static inline int test_bit_le(int nr, const void *vaddr)
{
const unsigned char *p = vaddr;
return (p[nr >> 3] & (1U << (nr & 7))) != 0;
}
-static inline int ext2_find_first_zero_bit(const void *vaddr, unsigned size)
+static inline int find_first_zero_bit_le(const void *vaddr, unsigned size)
{
const unsigned long *p = vaddr, *addr = vaddr;
int res;
@@ -393,33 +380,36 @@ static inline int ext2_find_first_zero_bit(const void *vaddr, unsigned size)
--p;
for (res = 0; res < 32; res++)
- if (!ext2_test_bit (res, p))
+ if (!test_bit_le(res, p))
break;
return (p - addr) * 32 + res;
}
-static inline unsigned long generic_find_next_zero_le_bit(const unsigned long *addr,
+static inline unsigned long find_next_zero_bit_le(const void *addr,
unsigned long size, unsigned long offset)
{
- const unsigned long *p = addr + (offset >> 5);
+ const unsigned long *p = addr;
int bit = offset & 31UL, res;
if (offset >= size)
return size;
+ p += offset >> 5;
+
if (bit) {
+ offset -= bit;
/* Look for zero in first longword */
for (res = bit; res < 32; res++)
- if (!ext2_test_bit (res, p))
- return (p - addr) * 32 + res;
+ if (!test_bit_le(res, p))
+ return offset + res;
p++;
+ offset += 32;
}
/* No zero yet, search remaining full bytes for a zero */
- res = ext2_find_first_zero_bit (p, size - 32 * (p - addr));
- return (p - addr) * 32 + res;
+ return offset + find_first_zero_bit_le(p, size - offset);
}
-static inline int ext2_find_first_bit(const void *vaddr, unsigned size)
+static inline int find_first_bit_le(const void *vaddr, unsigned size)
{
const unsigned long *p = vaddr, *addr = vaddr;
int res;
@@ -435,32 +425,42 @@ static inline int ext2_find_first_bit(const void *vaddr, unsigned size)
--p;
for (res = 0; res < 32; res++)
- if (ext2_test_bit(res, p))
+ if (test_bit_le(res, p))
break;
return (p - addr) * 32 + res;
}
-static inline unsigned long generic_find_next_le_bit(const unsigned long *addr,
+static inline unsigned long find_next_bit_le(const void *addr,
unsigned long size, unsigned long offset)
{
- const unsigned long *p = addr + (offset >> 5);
+ const unsigned long *p = addr;
int bit = offset & 31UL, res;
if (offset >= size)
return size;
+ p += offset >> 5;
+
if (bit) {
+ offset -= bit;
/* Look for one in first longword */
for (res = bit; res < 32; res++)
- if (ext2_test_bit(res, p))
- return (p - addr) * 32 + res;
+ if (test_bit_le(res, p))
+ return offset + res;
p++;
+ offset += 32;
}
/* No set bit yet, search remaining full bytes for a set bit */
- res = ext2_find_first_bit(p, size - 32 * (p - addr));
- return (p - addr) * 32 + res;
+ return offset + find_first_bit_le(p, size - offset);
}
+/* Bitmap functions for the ext2 filesystem. */
+
+#define ext2_set_bit_atomic(lock, nr, addr) \
+ test_and_set_bit_le(nr, addr)
+#define ext2_clear_bit_atomic(lock, nr, addr) \
+ test_and_clear_bit_le(nr, addr)
+
#endif /* __KERNEL__ */
#endif /* _M68K_BITOPS_H */
diff --git a/arch/m68k/include/asm/bitops_no.h b/arch/m68k/include/asm/bitops_no.h
index 9d3cbe5..7d3779f 100644
--- a/arch/m68k/include/asm/bitops_no.h
+++ b/arch/m68k/include/asm/bitops_no.h
@@ -196,7 +196,19 @@ static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
#include <asm-generic/bitops/hweight.h>
#include <asm-generic/bitops/lock.h>
-static __inline__ int ext2_set_bit(int nr, volatile void * addr)
+#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
+
+static inline void __set_bit_le(int nr, void *addr)
+{
+ __set_bit(nr ^ BITOP_LE_SWIZZLE, addr);
+}
+
+static inline void __clear_bit_le(int nr, void *addr)
+{
+ __clear_bit(nr ^ BITOP_LE_SWIZZLE, addr);
+}
+
+static inline int __test_and_set_bit_le(int nr, volatile void *addr)
{
char retval;
@@ -215,7 +227,7 @@ static __inline__ int ext2_set_bit(int nr, volatile void * addr)
return retval;
}
-static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
+static inline int __test_and_clear_bit_le(int nr, volatile void *addr)
{
char retval;
@@ -238,7 +250,7 @@ static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
({ \
int ret; \
spin_lock(lock); \
- ret = ext2_set_bit((nr), (addr)); \
+ ret = __test_and_set_bit_le((nr), (addr)); \
spin_unlock(lock); \
ret; \
})
@@ -247,12 +259,12 @@ static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
({ \
int ret; \
spin_lock(lock); \
- ret = ext2_clear_bit((nr), (addr)); \
+ ret = __test_and_clear_bit_le((nr), (addr)); \
spin_unlock(lock); \
ret; \
})
-static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
+static inline int test_bit_le(int nr, const volatile void *addr)
{
char retval;
@@ -271,10 +283,10 @@ static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
return retval;
}
-#define ext2_find_first_zero_bit(addr, size) \
- ext2_find_next_zero_bit((addr), (size), 0)
+#define find_first_zero_bit_le(addr, size) \
+ find_next_zero_bit_le((addr), (size), 0)
-static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
+static inline unsigned long find_next_zero_bit_le(void *addr, unsigned long size, unsigned long offset)
{
unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
unsigned long result = offset & ~31UL;
@@ -324,10 +336,6 @@ found_middle:
return result + ffz(__swab32(tmp));
}
-#define ext2_find_next_bit(addr, size, off) \
- generic_find_next_le_bit((unsigned long *)(addr), (size), (off))
-#include <asm-generic/bitops/minix.h>
-
#endif /* __KERNEL__ */
#include <asm-generic/bitops/fls.h>
diff --git a/arch/m68k/include/asm/bootstd.h b/arch/m68k/include/asm/bootstd.h
index bdc1a4a..e518f5a 100644
--- a/arch/m68k/include/asm/bootstd.h
+++ b/arch/m68k/include/asm/bootstd.h
@@ -31,7 +31,7 @@
#define __BN_flash_write_range 20
/* Calling conventions compatible to (uC)linux/68k
- * We use simmilar macros to call into the bootloader as for uClinux
+ * We use similar macros to call into the bootloader as for uClinux
*/
#define __bsc_return(type, res) \
diff --git a/arch/m68k/include/asm/commproc.h b/arch/m68k/include/asm/commproc.h
index edf5eb6..a739985 100644
--- a/arch/m68k/include/asm/commproc.h
+++ b/arch/m68k/include/asm/commproc.h
@@ -88,7 +88,7 @@ typedef struct cpm_buf_desc {
/* rx bd status/control bits */
-#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */
+#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */
#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor in table */
#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */
#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame OR control char */
@@ -96,7 +96,7 @@ typedef struct cpm_buf_desc {
#define BD_SC_FIRST ((ushort)0x0400) /* 1st buffer in an HDLC frame */
#define BD_SC_ADDR ((ushort)0x0400) /* 1st byte is a multidrop address */
-#define BD_SC_CM ((ushort)0x0200) /* Continous mode */
+#define BD_SC_CM ((ushort)0x0200) /* Continuous mode */
#define BD_SC_ID ((ushort)0x0100) /* Received too many idles */
#define BD_SC_AM ((ushort)0x0080) /* Multidrop address match */
diff --git a/arch/m68k/include/asm/delay_no.h b/arch/m68k/include/asm/delay_no.h
index 55cbd62..c3a0edc 100644
--- a/arch/m68k/include/asm/delay_no.h
+++ b/arch/m68k/include/asm/delay_no.h
@@ -16,7 +16,7 @@ static inline void __delay(unsigned long loops)
* long word alignment which is the faster version.
* The 0x4a8e is of course a 'tstl %fp' instruction. This is better
* than using a NOP (0x4e71) instruction because it executes in one
- * cycle not three and doesn't allow for an arbitary delay waiting
+ * cycle not three and doesn't allow for an arbitrary delay waiting
* for bus cycles to finish. Also fp/a6 isn't likely to cause a
* stall waiting for the register to become valid if such is added
* to the coldfire at some stage.
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h
index c64c7b7..b204683 100644
--- a/arch/m68k/include/asm/gpio.h
+++ b/arch/m68k/include/asm/gpio.h
@@ -31,7 +31,7 @@
* GPIOs in a single control area, others have some GPIOs implemented in
* different modules.
*
- * This implementation attempts accomodate the differences while presenting
+ * This implementation attempts accommodate the differences while presenting
* a generic interface that will optimize to as few instructions as possible.
*/
#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index 55d5a4c5..b6bf2c5 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -157,7 +157,7 @@
#define MCFFEC_SIZE 0x800 /* Register set size */
/*
- * Reset Controll Unit.
+ * Reset Control Unit.
*/
#define MCF_RCR 0xFC0A0000
#define MCF_RSR 0xFC0A0001
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index 8996df6..6235921 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -48,7 +48,7 @@
#define MCFSIM_DMR1 (MCF_IPSBAR + 0x54) /* Address mask 1 */
/*
- * Reset Controll Unit (relative to IPSBAR).
+ * Reset Control Unit (relative to IPSBAR).
*/
#define MCF_RCR 0x110000
#define MCF_RSR 0x110001
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 74855a6..758810e 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -283,7 +283,7 @@
#endif
/*
- * Reset Controll Unit (relative to IPSBAR).
+ * Reset Control Unit (relative to IPSBAR).
*/
#define MCF_RCR 0x110000
#define MCF_RSR 0x110001
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 4c94c01..8f8609f 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -29,7 +29,7 @@
#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */
#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */
#define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */
-#define MCFSIM_PLLCR 0x08 /* PLL Controll Reg*/
+#define MCFSIM_PLLCR 0x08 /* PLL Control Reg*/
#define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/
#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */
#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index 762c58c..51e00b0 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -29,7 +29,7 @@
#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */
#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */
#define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */
-#define MCFSIM_PLLCR 0x08 /* PLL Controll Reg*/
+#define MCFSIM_PLLCR 0x08 /* PLL Control Reg*/
#define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/
#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */
#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */
diff --git a/arch/m68k/include/asm/m68360_quicc.h b/arch/m68k/include/asm/m68360_quicc.h
index 6d40f4d..59414cc 100644
--- a/arch/m68k/include/asm/m68360_quicc.h
+++ b/arch/m68k/include/asm/m68360_quicc.h
@@ -32,7 +32,7 @@ struct user_data {
/* BASE + 0x000: user data memory */
volatile unsigned char udata_bd_ucode[0x400]; /*user data bd's Ucode*/
volatile unsigned char udata_bd[0x200]; /*user data Ucode */
- volatile unsigned char ucode_ext[0x100]; /*Ucode Extention ram */
+ volatile unsigned char ucode_ext[0x100]; /*Ucode Extension ram */
volatile unsigned char RESERVED1[0x500]; /* Reserved area */
};
#else
diff --git a/arch/m68k/include/asm/mac_oss.h b/arch/m68k/include/asm/mac_oss.h
index 7221f72..3cf2b6e 100644
--- a/arch/m68k/include/asm/mac_oss.h
+++ b/arch/m68k/include/asm/mac_oss.h
@@ -61,7 +61,7 @@
/*
* OSS Interrupt levels for various sub-systems
*
- * This mapping is layed out with two things in mind: first, we try to keep
+ * This mapping is laid out with two things in mind: first, we try to keep
* things on their own levels to avoid having to do double-dispatches. Second,
* the levels match as closely as possible the alternate IRQ mapping mode (aka
* "A/UX mode") available on some VIA machines.
diff --git a/arch/m68k/include/asm/mac_via.h b/arch/m68k/include/asm/mac_via.h
index 39afb43..a59665e 100644
--- a/arch/m68k/include/asm/mac_via.h
+++ b/arch/m68k/include/asm/mac_via.h
@@ -204,7 +204,7 @@
#define vT2CL 0x1000 /* [VIA only] Timer two counter low. */
#define vT2CH 0x1200 /* [VIA only] Timer two counter high. */
#define vSR 0x1400 /* [VIA only] Shift register. */
-#define vACR 0x1600 /* [VIA only] Auxilary control register. */
+#define vACR 0x1600 /* [VIA only] Auxiliary control register. */
#define vPCR 0x1800 /* [VIA only] Peripheral control register. */
/* CHRP sez never ever to *write* this.
* Mac family says never to *change* this.
diff --git a/arch/m68k/include/asm/macintosh.h b/arch/m68k/include/asm/macintosh.h
index 50db359..c2a1c5e 100644
--- a/arch/m68k/include/asm/macintosh.h
+++ b/arch/m68k/include/asm/macintosh.h
@@ -14,7 +14,7 @@ extern void mac_init_IRQ(void);
extern int mac_irq_pending(unsigned int);
/*
- * Floppy driver magic hook - probably shouldnt be here
+ * Floppy driver magic hook - probably shouldn't be here
*/
extern void via1_set_head(int);
diff --git a/arch/m68k/include/asm/mcftimer.h b/arch/m68k/include/asm/mcftimer.h
index 92b276f..351c272 100644
--- a/arch/m68k/include/asm/mcftimer.h
+++ b/arch/m68k/include/asm/mcftimer.h
@@ -27,7 +27,7 @@
/*
* Bit definitions for the Timer Mode Register (TMR).
- * Register bit flags are common accross ColdFires.
+ * Register bit flags are common across ColdFires.
*/
#define MCFTIMER_TMR_PREMASK 0xff00 /* Prescalar mask */
#define MCFTIMER_TMR_DISCE 0x0000 /* Disable capture */
diff --git a/arch/m68k/include/asm/types.h b/arch/m68k/include/asm/types.h
index 6441cb5..b17fd11 100644
--- a/arch/m68k/include/asm/types.h
+++ b/arch/m68k/include/asm/types.h
@@ -23,15 +23,6 @@ typedef unsigned short umode_t;
#define BITS_PER_LONG 32
-#ifndef __ASSEMBLY__
-
-/* DMA addresses are always 32-bits wide */
-
-typedef u32 dma_addr_t;
-typedef u32 dma64_addr_t;
-
-#endif /* __ASSEMBLY__ */
-
#endif /* __KERNEL__ */
#endif /* _M68K_TYPES_H */
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 26d851d..29e1790 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -343,10 +343,14 @@
#define __NR_fanotify_init 337
#define __NR_fanotify_mark 338
#define __NR_prlimit64 339
+#define __NR_name_to_handle_at 340
+#define __NR_open_by_handle_at 341
+#define __NR_clock_adjtime 342
+#define __NR_syncfs 343
#ifdef __KERNEL__
-#define NR_syscalls 340
+#define NR_syscalls 344
#define __ARCH_WANT_IPC_PARSE_VERSION
#define __ARCH_WANT_OLD_READDIR
generated by cgit v1.1 at 2024-12-25 05:21:00 +0000