diff options
Diffstat (limited to 'drivers/media/dvb/frontends')
-rw-r--r-- | drivers/media/dvb/frontends/Kconfig | 46 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/Makefile | 1 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/bcm3510.c | 6 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/cx22702.c | 22 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/cx24110.c | 23 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/cx24123.c | 889 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/cx24123.h | 51 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/dvb-pll.c | 15 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/dvb-pll.h | 2 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/lgdt330x.c | 3 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/nxt2002.c | 3 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/nxt6000.c | 10 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/or51211.c | 5 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/s5h1420.c | 4 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/sp8870.c | 3 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/sp887x.c | 5 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/stv0299.c | 12 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/stv0299.h | 1 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/tda10021.c | 4 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/tda1004x.c | 141 |
20 files changed, 1138 insertions, 108 deletions
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig index 8e269e1..db3a8b4 100644 --- a/drivers/media/dvb/frontends/Kconfig +++ b/drivers/media/dvb/frontends/Kconfig @@ -16,6 +16,12 @@ config DVB_CX24110 help A DVB-S tuner module. Say Y when you want to support this frontend. +config DVB_CX24123 + tristate "Conexant CX24123 based" + depends on DVB_CORE + help + A DVB-S tuner module. Say Y when you want to support this frontend. + config DVB_TDA8083 tristate "Philips TDA8083 based" depends on DVB_CORE @@ -50,18 +56,19 @@ comment "DVB-T (terrestrial) frontends" depends on DVB_CORE config DVB_SP8870 - tristate "Spase sp8870 based" + tristate "Spase sp8870 based" depends on DVB_CORE select FW_LOADER help - A DVB-T tuner module. Say Y when you want to support this frontend. + A DVB-T tuner module. Say Y when you want to support this frontend. This driver needs external firmware. Please use the command "<kerneldir>/Documentation/dvb/get_dvb_firmware sp8870" to - download/extract it, and then copy it to /usr/lib/hotplug/firmware. + download/extract it, and then copy it to /usr/lib/hotplug/firmware + or /lib/firmware (depending on configuration of firmware hotplug). config DVB_SP887X - tristate "Spase sp887x based" + tristate "Spase sp887x based" depends on DVB_CORE select FW_LOADER help @@ -69,7 +76,8 @@ config DVB_SP887X This driver needs external firmware. Please use the command "<kerneldir>/Documentation/dvb/get_dvb_firmware sp887x" to - download/extract it, and then copy it to /usr/lib/hotplug/firmware. + download/extract it, and then copy it to /usr/lib/hotplug/firmware + or /lib/firmware (depending on configuration of firmware hotplug). config DVB_CX22700 tristate "Conexant CX22700 based" @@ -78,10 +86,10 @@ config DVB_CX22700 A DVB-T tuner module. Say Y when you want to support this frontend. config DVB_CX22702 - tristate "Conexant cx22702 demodulator (OFDM)" - depends on DVB_CORE - help - A DVB-T tuner module. Say Y when you want to support this frontend. + tristate "Conexant cx22702 demodulator (OFDM)" + depends on DVB_CORE + help + A DVB-T tuner module. Say Y when you want to support this frontend. config DVB_L64781 tristate "LSI L64781" @@ -98,8 +106,9 @@ config DVB_TDA1004X This driver needs external firmware. Please use the commands "<kerneldir>/Documentation/dvb/get_dvb_firmware tda10045", - "<kerneldir>/Documentation/dvb/get_dvb_firmware tda10046" to - download/extract them, and then copy them to /usr/lib/hotplug/firmware. + "<kerneldir>/Documentation/dvb/get_dvb_firmware tda10046" to + download/extract them, and then copy them to /usr/lib/hotplug/firmware + or /lib/firmware (depending on configuration of firmware hotplug). config DVB_NXT6000 tristate "NxtWave Communications NXT6000 based" @@ -140,13 +149,13 @@ config DVB_VES1820 tristate "VLSI VES1820 based" depends on DVB_CORE help - A DVB-C tuner module. Say Y when you want to support this frontend. + A DVB-C tuner module. Say Y when you want to support this frontend. config DVB_TDA10021 tristate "Philips TDA10021 based" depends on DVB_CORE help - A DVB-C tuner module. Say Y when you want to support this frontend. + A DVB-C tuner module. Say Y when you want to support this frontend. config DVB_STV0297 tristate "ST STV0297 based" @@ -164,6 +173,11 @@ config DVB_NXT2002 help An ATSC 8VSB tuner module. Say Y when you want to support this frontend. + This driver needs external firmware. Please use the command + "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to + download/extract it, and then copy it to /usr/lib/hotplug/firmware + or /lib/firmware (depending on configuration of firmware hotplug). + config DVB_NXT200X tristate "Nextwave NXT2002/NXT2004 based" depends on DVB_CORE @@ -172,6 +186,12 @@ config DVB_NXT200X An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want to support this frontend. + This driver needs external firmware. Please use the commands + "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" and + "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to + download/extract them, and then copy them to /usr/lib/hotplug/firmware + or /lib/firmware (depending on configuration of firmware hotplug). + config DVB_OR51211 tristate "or51211 based (pcHDTV HD2000 card)" depends on DVB_CORE diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile index a98760f..615ec83 100644 --- a/drivers/media/dvb/frontends/Makefile +++ b/drivers/media/dvb/frontends/Makefile @@ -32,3 +32,4 @@ obj-$(CONFIG_DVB_OR51132) += or51132.o obj-$(CONFIG_DVB_BCM3510) += bcm3510.o obj-$(CONFIG_DVB_S5H1420) += s5h1420.o obj-$(CONFIG_DVB_LGDT330X) += lgdt330x.o +obj-$(CONFIG_DVB_CX24123) += cx24123.o diff --git a/drivers/media/dvb/frontends/bcm3510.c b/drivers/media/dvb/frontends/bcm3510.c index 8ceb9a3..3b132ba 100644 --- a/drivers/media/dvb/frontends/bcm3510.c +++ b/drivers/media/dvb/frontends/bcm3510.c @@ -255,7 +255,7 @@ static int bcm3510_bert_reset(struct bcm3510_state *st) bcm3510_register_value b; int ret; - if ((ret < bcm3510_readB(st,0xfa,&b)) < 0) + if ((ret = bcm3510_readB(st,0xfa,&b)) < 0) return ret; b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b); @@ -623,13 +623,13 @@ static int bcm3510_download_firmware(struct dvb_frontend* fe) err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret); return ret; } - deb_info("got firmware: %d\n",fw->size); + deb_info("got firmware: %zd\n",fw->size); b = fw->data; for (i = 0; i < fw->size;) { addr = le16_to_cpu( *( (u16 *)&b[i] ) ); len = le16_to_cpu( *( (u16 *)&b[i+2] ) ); - deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04x\n",addr,len,fw->size); + deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size); if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) { err("firmware download failed: %d\n",ret); return ret; diff --git a/drivers/media/dvb/frontends/cx22702.c b/drivers/media/dvb/frontends/cx22702.c index 5de0e6d3..0fc899f 100644 --- a/drivers/media/dvb/frontends/cx22702.c +++ b/drivers/media/dvb/frontends/cx22702.c @@ -195,6 +195,16 @@ static int cx22702_get_tps (struct cx22702_state *state, struct dvb_ofdm_paramet return 0; } +static int cx22702_i2c_gate_ctrl(struct dvb_frontend* fe, int enable) +{ + struct cx22702_state* state = fe->demodulator_priv; + dprintk ("%s(%d)\n", __FUNCTION__, enable); + if (enable) + return cx22702_writereg (state, 0x0D, cx22702_readreg(state, 0x0D) & 0xfe); + else + return cx22702_writereg (state, 0x0D, cx22702_readreg(state, 0x0D) | 1); +} + /* Talk to the demod, set the FEC, GUARD, QAM settings etc */ static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_parameters *p) { @@ -202,7 +212,7 @@ static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_paramet struct cx22702_state* state = fe->demodulator_priv; /* set PLL */ - cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) &0xfe); + cx22702_i2c_gate_ctrl(fe, 1); if (state->config->pll_set) { state->config->pll_set(fe, p); } else if (state->config->pll_desc) { @@ -216,7 +226,7 @@ static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_paramet } else { BUG(); } - cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1); + cx22702_i2c_gate_ctrl(fe, 0); /* set inversion */ cx22702_set_inversion (state, p->inversion); @@ -349,11 +359,10 @@ static int cx22702_init (struct dvb_frontend* fe) cx22702_writereg (state, 0xf8, (state->config->output_mode << 1) & 0x02); /* init PLL */ - if (state->config->pll_init) { - cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) & 0xfe); + if (state->config->pll_init) state->config->pll_init(fe); - cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1); - } + + cx22702_i2c_gate_ctrl(fe, 0); return 0; } @@ -531,6 +540,7 @@ static struct dvb_frontend_ops cx22702_ops = { .read_signal_strength = cx22702_read_signal_strength, .read_snr = cx22702_read_snr, .read_ucblocks = cx22702_read_ucblocks, + .i2c_gate_ctrl = cx22702_i2c_gate_ctrl, }; module_param(debug, int, 0644); diff --git a/drivers/media/dvb/frontends/cx24110.c b/drivers/media/dvb/frontends/cx24110.c index 0c4db80..d15d32c 100644 --- a/drivers/media/dvb/frontends/cx24110.c +++ b/drivers/media/dvb/frontends/cx24110.c @@ -27,7 +27,6 @@ #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/init.h> -#include <linux/jiffies.h> #include "dvb_frontend.h" #include "cx24110.h" @@ -56,7 +55,7 @@ static int debug; static struct {u8 reg; u8 data;} cx24110_regdata[]= /* Comments beginning with @ denote this value should - be the default */ + be the default */ {{0x09,0x01}, /* SoftResetAll */ {0x09,0x00}, /* release reset */ {0x01,0xe8}, /* MSB of code rate 27.5MS/s */ @@ -67,26 +66,26 @@ static struct {u8 reg; u8 data;} cx24110_regdata[]= {0x07,0x01}, /* @ Fclk, i.e. sampling clock, 60MHz */ {0x0a,0x00}, /* @ partial chip disables, do not set */ {0x0b,0x01}, /* set output clock in gapped mode, start signal low - active for first byte */ + active for first byte */ {0x0c,0x11}, /* no parity bytes, large hold time, serial data out */ {0x0d,0x6f}, /* @ RS Sync/Unsync thresholds */ {0x10,0x40}, /* chip doc is misleading here: write bit 6 as 1 - to avoid starting the BER counter. Reset the - CRC test bit. Finite counting selected */ + to avoid starting the BER counter. Reset the + CRC test bit. Finite counting selected */ {0x15,0xff}, /* @ size of the limited time window for RS BER - estimation. It is <value>*256 RS blocks, this - gives approx. 2.6 sec at 27.5MS/s, rate 3/4 */ + estimation. It is <value>*256 RS blocks, this + gives approx. 2.6 sec at 27.5MS/s, rate 3/4 */ {0x16,0x00}, /* @ enable all RS output ports */ {0x17,0x04}, /* @ time window allowed for the RS to sync */ {0x18,0xae}, /* @ allow all standard DVB code rates to be scanned - for automatically */ + for automatically */ /* leave the current code rate and normalization - registers as they are after reset... */ + registers as they are after reset... */ {0x21,0x10}, /* @ during AutoAcq, search each viterbi setting - only once */ + only once */ {0x23,0x18}, /* @ size of the limited time window for Viterbi BER - estimation. It is <value>*65536 channel bits, i.e. - approx. 38ms at 27.5MS/s, rate 3/4 */ + estimation. It is <value>*65536 channel bits, i.e. + approx. 38ms at 27.5MS/s, rate 3/4 */ {0x24,0x24}, /* do not trigger Viterbi CRC test. Finite count window */ /* leave front-end AGC parameters at default values */ /* leave decimation AGC parameters at default values */ diff --git a/drivers/media/dvb/frontends/cx24123.c b/drivers/media/dvb/frontends/cx24123.c new file mode 100644 index 0000000..d661c6f --- /dev/null +++ b/drivers/media/dvb/frontends/cx24123.c @@ -0,0 +1,889 @@ +/* + Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver + + Copyright (C) 2005 Steven Toth <stoth@hauppauge.com> + + Support for KWorld DVB-S 100 by Vadim Catana <skystar@moldova.cc> + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include <linux/slab.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> + +#include "dvb_frontend.h" +#include "cx24123.h" + +static int debug; +#define dprintk(args...) \ + do { \ + if (debug) printk (KERN_DEBUG "cx24123: " args); \ + } while (0) + +struct cx24123_state +{ + struct i2c_adapter* i2c; + struct dvb_frontend_ops ops; + const struct cx24123_config* config; + + struct dvb_frontend frontend; + + u32 lastber; + u16 snr; + u8 lnbreg; + + /* Some PLL specifics for tuning */ + u32 VCAarg; + u32 VGAarg; + u32 bandselectarg; + u32 pllarg; + + /* The Demod/Tuner can't easily provide these, we cache them */ + u32 currentfreq; + u32 currentsymbolrate; +}; + +/* Various tuner defaults need to be established for a given symbol rate Sps */ +static struct +{ + u32 symbolrate_low; + u32 symbolrate_high; + u32 VCAslope; + u32 VCAoffset; + u32 VGA1offset; + u32 VGA2offset; + u32 VCAprogdata; + u32 VGAprogdata; +} cx24123_AGC_vals[] = +{ + { + .symbolrate_low = 1000000, + .symbolrate_high = 4999999, + .VCAslope = 0x07, + .VCAoffset = 0x0f, + .VGA1offset = 0x1f8, + .VGA2offset = 0x1f8, + .VGAprogdata = (2 << 18) | (0x1f8 << 9) | 0x1f8, + .VCAprogdata = (4 << 18) | (0x07 << 9) | 0x07, + }, + { + .symbolrate_low = 5000000, + .symbolrate_high = 14999999, + .VCAslope = 0x1f, + .VCAoffset = 0x1f, + .VGA1offset = 0x1e0, + .VGA2offset = 0x180, + .VGAprogdata = (2 << 18) | (0x180 << 9) | 0x1e0, + .VCAprogdata = (4 << 18) | (0x07 << 9) | 0x1f, + }, + { + .symbolrate_low = 15000000, + .symbolrate_high = 45000000, + .VCAslope = 0x3f, + .VCAoffset = 0x3f, + .VGA1offset = 0x180, + .VGA2offset = 0x100, + .VGAprogdata = (2 << 18) | (0x100 << 9) | 0x180, + .VCAprogdata = (4 << 18) | (0x07 << 9) | 0x3f, + }, +}; + +/* + * Various tuner defaults need to be established for a given frequency kHz. + * fixme: The bounds on the bands do not match the doc in real life. + * fixme: Some of them have been moved, other might need adjustment. + */ +static struct +{ + u32 freq_low; + u32 freq_high; + u32 bandselect; + u32 VCOdivider; + u32 VCOnumber; + u32 progdata; +} cx24123_bandselect_vals[] = +{ + { + .freq_low = 950000, + .freq_high = 1018999, + .bandselect = 0x40, + .VCOdivider = 4, + .VCOnumber = 7, + .progdata = (0 << 18) | (0 << 9) | 0x40, + }, + { + .freq_low = 1019000, + .freq_high = 1074999, + .bandselect = 0x80, + .VCOdivider = 4, + .VCOnumber = 8, + .progdata = (0 << 18) | (0 << 9) | 0x80, + }, + { + .freq_low = 1075000, + .freq_high = 1227999, + .bandselect = 0x01, + .VCOdivider = 2, + .VCOnumber = 1, + .progdata = (0 << 18) | (1 << 9) | 0x01, + }, + { + .freq_low = 1228000, + .freq_high = 1349999, + .bandselect = 0x02, + .VCOdivider = 2, + .VCOnumber = 2, + .progdata = (0 << 18) | (1 << 9) | 0x02, + }, + { + .freq_low = 1350000, + .freq_high = 1481999, + .bandselect = 0x04, + .VCOdivider = 2, + .VCOnumber = 3, + .progdata = (0 << 18) | (1 << 9) | 0x04, + }, + { + .freq_low = 1482000, + .freq_high = 1595999, + .bandselect = 0x08, + .VCOdivider = 2, + .VCOnumber = 4, + .progdata = (0 << 18) | (1 << 9) | 0x08, + }, + { + .freq_low = 1596000, + .freq_high = 1717999, + .bandselect = 0x10, + .VCOdivider = 2, + .VCOnumber = 5, + .progdata = (0 << 18) | (1 << 9) | 0x10, + }, + { + .freq_low = 1718000, + .freq_high = 1855999, + .bandselect = 0x20, + .VCOdivider = 2, + .VCOnumber = 6, + .progdata = (0 << 18) | (1 << 9) | 0x20, + }, + { + .freq_low = 1856000, + .freq_high = 2035999, + .bandselect = 0x40, + .VCOdivider = 2, + .VCOnumber = 7, + .progdata = (0 << 18) | (1 << 9) | 0x40, + }, + { + .freq_low = 2036000, + .freq_high = 2149999, + .bandselect = 0x80, + .VCOdivider = 2, + .VCOnumber = 8, + .progdata = (0 << 18) | (1 << 9) | 0x80, + }, +}; + +static struct { + u8 reg; + u8 data; +} cx24123_regdata[] = +{ + {0x00, 0x03}, /* Reset system */ + {0x00, 0x00}, /* Clear reset */ + {0x01, 0x3b}, /* Apply sensible defaults, from an i2c sniffer */ + {0x03, 0x07}, + {0x04, 0x10}, + {0x05, 0x04}, + {0x06, 0x31}, + {0x0d, 0x02}, + {0x0e, 0x03}, + {0x0f, 0xfe}, + {0x10, 0x01}, + {0x14, 0x01}, + {0x15, 0x98}, + {0x16, 0x00}, + {0x17, 0x01}, + {0x1b, 0x05}, + {0x1c, 0x80}, + {0x1d, 0x00}, + {0x1e, 0x00}, + {0x20, 0x41}, + {0x21, 0x15}, + {0x27, 0x14}, + {0x28, 0x46}, + {0x29, 0x00}, + {0x2a, 0xb0}, + {0x2b, 0x73}, + {0x2c, 0x00}, + {0x2d, 0x00}, + {0x2e, 0x00}, + {0x2f, 0x00}, + {0x30, 0x00}, + {0x31, 0x00}, + {0x32, 0x8c}, + {0x33, 0x00}, + {0x34, 0x00}, + {0x35, 0x03}, + {0x36, 0x02}, + {0x37, 0x3a}, + {0x3a, 0x00}, /* Enable AGC accumulator */ + {0x44, 0x00}, + {0x45, 0x00}, + {0x46, 0x05}, + {0x56, 0x41}, + {0x57, 0xff}, + {0x67, 0x83}, +}; + +static int cx24123_writereg(struct cx24123_state* state, int reg, int data) +{ + u8 buf[] = { reg, data }; + struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; + int err; + + if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { + printk("%s: writereg error(err == %i, reg == 0x%02x," + " data == 0x%02x)\n", __FUNCTION__, err, reg, data); + return -EREMOTEIO; + } + + return 0; +} + +static int cx24123_writelnbreg(struct cx24123_state* state, int reg, int data) +{ + u8 buf[] = { reg, data }; + /* fixme: put the intersil addr int the config */ + struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = buf, .len = 2 }; + int err; + + if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { + printk("%s: writelnbreg error (err == %i, reg == 0x%02x," + " data == 0x%02x)\n", __FUNCTION__, err, reg, data); + return -EREMOTEIO; + } + + /* cache the write, no way to read back */ + state->lnbreg = data; + + return 0; +} + +static int cx24123_readreg(struct cx24123_state* state, u8 reg) +{ + int ret; + u8 b0[] = { reg }; + u8 b1[] = { 0 }; + struct i2c_msg msg[] = { + { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 }, + { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } + }; + + ret = i2c_transfer(state->i2c, msg, 2); + + if (ret != 2) { + printk("%s: reg=0x%x (error=%d)\n", __FUNCTION__, reg, ret); + return ret; + } + + return b1[0]; +} + +static int cx24123_readlnbreg(struct cx24123_state* state, u8 reg) +{ + return state->lnbreg; +} + +static int cx24123_set_inversion(struct cx24123_state* state, fe_spectral_inversion_t inversion) +{ + switch (inversion) { + case INVERSION_OFF: + cx24123_writereg(state, 0x0e, cx24123_readreg(state, 0x0e) & 0x7f); + cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) | 0x80); + break; + case INVERSION_ON: + cx24123_writereg(state, 0x0e, cx24123_readreg(state, 0x0e) | 0x80); + cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) | 0x80); + break; + case INVERSION_AUTO: + cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) & 0x7f); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int cx24123_get_inversion(struct cx24123_state* state, fe_spectral_inversion_t *inversion) +{ + u8 val; + + val = cx24123_readreg(state, 0x1b) >> 7; + + if (val == 0) + *inversion = INVERSION_OFF; + else + *inversion = INVERSION_ON; + + return 0; +} + +static int cx24123_set_fec(struct cx24123_state* state, fe_code_rate_t fec) +{ + if ( (fec < FEC_NONE) || (fec > FEC_AUTO) ) + fec = FEC_AUTO; + + /* Hardware has 5/11 and 3/5 but are never unused */ + switch (fec) { + case FEC_NONE: + return cx24123_writereg(state, 0x0f, 0x01); + case FEC_1_2: + return cx24123_writereg(state, 0x0f, 0x02); + case FEC_2_3: + return cx24123_writereg(state, 0x0f, 0x04); + case FEC_3_4: + return cx24123_writereg(state, 0x0f, 0x08); + case FEC_5_6: + return cx24123_writereg(state, 0x0f, 0x20); + case FEC_7_8: + return cx24123_writereg(state, 0x0f, 0x80); + case FEC_AUTO: + return cx24123_writereg(state, 0x0f, 0xae); + default: + return -EOPNOTSUPP; + } +} + +static int cx24123_get_fec(struct cx24123_state* state, fe_code_rate_t *fec) +{ + int ret; + u8 val; + + ret = cx24123_readreg (state, 0x1b); + if (ret < 0) + return ret; + val = ret & 0x07; + switch (val) { + case 1: + *fec = FEC_1_2; + break; + case 3: + *fec = FEC_2_3; + break; + case 4: + *fec = FEC_3_4; + break; + case 5: + *fec = FEC_4_5; + break; + case 6: + *fec = FEC_5_6; + break; + case 7: + *fec = FEC_7_8; + break; + case 2: /* *fec = FEC_3_5; break; */ + case 0: /* *fec = FEC_5_11; break; */ + *fec = FEC_AUTO; + break; + default: + *fec = FEC_NONE; // can't happen + } + + return 0; +} + +/* fixme: Symbol rates < 3MSps may not work because of precision loss */ +static int cx24123_set_symbolrate(struct cx24123_state* state, u32 srate) +{ + u32 val; + + val = (srate / 1185) * 100; + + /* Compensate for scaling up, by removing 17 symbols per 1Msps */ + val = val - (17 * (srate / 1000000)); + + cx24123_writereg(state, 0x08, (val >> 16) & 0xff ); + cx24123_writereg(state, 0x09, (val >> 8) & 0xff ); + cx24123_writereg(state, 0x0a, (val ) & 0xff ); + + return 0; +} + +/* + * Based on the required frequency and symbolrate, the tuner AGC has to be configured + * and the correct band selected. Calculate those values + */ +static int cx24123_pll_calculate(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) +{ + struct cx24123_state *state = fe->demodulator_priv; + u32 ndiv = 0, adiv = 0, vco_div = 0; + int i = 0; + + /* Defaults for low freq, low rate */ + state->VCAarg = cx24123_AGC_vals[0].VCAprogdata; + state->VGAarg = cx24123_AGC_vals[0].VGAprogdata; + state->bandselectarg = cx24123_bandselect_vals[0].progdata; + vco_div = cx24123_bandselect_vals[0].VCOdivider; + + /* For the given symbolerate, determine the VCA and VGA programming bits */ + for (i = 0; i < sizeof(cx24123_AGC_vals) / sizeof(cx24123_AGC_vals[0]); i++) + { + if ((cx24123_AGC_vals[i].symbolrate_low <= p->u.qpsk.symbol_rate) && + (cx24123_AGC_vals[i].symbolrate_high >= p->u.qpsk.symbol_rate) ) { + state->VCAarg = cx24123_AGC_vals[i].VCAprogdata; + state->VGAarg = cx24123_AGC_vals[i].VGAprogdata; + } + } + + /* For the given frequency, determine the bandselect programming bits */ + for (i = 0; i < sizeof(cx24123_bandselect_vals) / sizeof(cx24123_bandselect_vals[0]); i++) + { + if ((cx24123_bandselect_vals[i].freq_low <= p->frequency) && + (cx24123_bandselect_vals[i].freq_high >= p->frequency) ) { + state->bandselectarg = cx24123_bandselect_vals[i].progdata; + vco_div = cx24123_bandselect_vals[i].VCOdivider; + } + } + + /* Determine the N/A dividers for the requested lband freq (in kHz). */ + /* Note: 10111 (kHz) is the Crystal Freq and divider of 10. */ + ndiv = ( ((p->frequency * vco_div) / (10111 / 10) / 2) / 32) & 0x1ff; + adiv = ( ((p->frequency * vco_div) / (10111 / 10) / 2) % 32) & 0x1f; + + if (adiv == 0) + adiv++; + + /* determine the correct pll frequency values. */ + /* Command 11, refdiv 11, cpump polarity 1, cpump current 3mA 10. */ + state->pllarg = (3 << 19) | (3 << 17) | (1 << 16) | (2 << 14); + state->pllarg |= (ndiv << 5) | adiv; + + return 0; +} + +/* + * Tuner data is 21 bits long, must be left-aligned in data. + * Tuner cx24109 is written through a dedicated 3wire interface on the demod chip. + */ +static int cx24123_pll_writereg(struct dvb_frontend* fe, struct dvb_frontend_parameters *p, u32 data) +{ + struct cx24123_state *state = fe->demodulator_priv; + unsigned long timeout; + + /* align the 21 bytes into to bit23 boundary */ + data = data << 3; + + /* Reset the demod pll word length to 0x15 bits */ + cx24123_writereg(state, 0x21, 0x15); + + /* write the msb 8 bits, wait for the send to be completed */ + timeout = jiffies + msecs_to_jiffies(40); + cx24123_writereg(state, 0x22, (data >> 16) & 0xff); + while ((cx24123_readreg(state, 0x20) & 0x40) == 0) { + if (time_after(jiffies, timeout)) { + printk("%s: demodulator is not responding, possibly hung, aborting.\n", __FUNCTION__); + return -EREMOTEIO; + } + msleep(10); + } + + /* send another 8 bytes, wait for the send to be completed */ + timeout = jiffies + msecs_to_jiffies(40); + cx24123_writereg(state, 0x22, (data>>8) & 0xff ); + while ((cx24123_readreg(state, 0x20) & 0x40) == 0) { + if (time_after(jiffies, timeout)) { + printk("%s: demodulator is not responding, possibly hung, aborting.\n", __FUNCTION__); + return -EREMOTEIO; + } + msleep(10); + } + + /* send the lower 5 bits of this byte, padded with 3 LBB, wait for the send to be completed */ + timeout = jiffies + msecs_to_jiffies(40); + cx24123_writereg(state, 0x22, (data) & 0xff ); + while ((cx24123_readreg(state, 0x20) & 0x80)) { + if (time_after(jiffies, timeout)) { + printk("%s: demodulator is not responding, possibly hung, aborting.\n", __FUNCTION__); + return -EREMOTEIO; + } + msleep(10); + } + + /* Trigger the demod to configure the tuner */ + cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) | 2); + cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) & 0xfd); + + return 0; +} + +static int cx24123_pll_tune(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) +{ + struct cx24123_state *state = fe->demodulator_priv; + + if (cx24123_pll_calculate(fe, p) != 0) { + printk("%s: cx24123_pll_calcutate failed\n",__FUNCTION__); + return -EINVAL; + } + + /* Write the new VCO/VGA */ + cx24123_pll_writereg(fe, p, state->VCAarg); + cx24123_pll_writereg(fe, p, state->VGAarg); + + /* Write the new bandselect and pll args */ + cx24123_pll_writereg(fe, p, state->bandselectarg); + cx24123_pll_writereg(fe, p, state->pllarg); + + return 0; +} + +static int cx24123_initfe(struct dvb_frontend* fe) +{ + struct cx24123_state *state = fe->demodulator_priv; + int i; + + /* Configure the demod to a good set of defaults */ + for (i = 0; i < sizeof(cx24123_regdata) / sizeof(cx24123_regdata[0]); i++) + cx24123_writereg(state, cx24123_regdata[i].reg, cx24123_regdata[i].data); + + if (state->config->pll_init) + state->config->pll_init(fe); + + /* Configure the LNB for 14V */ + if (state->config->use_isl6421) + cx24123_writelnbreg(state, 0x0, 0x2a); + + return 0; +} + +static int cx24123_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) +{ + struct cx24123_state *state = fe->demodulator_priv; + u8 val; + + switch (state->config->use_isl6421) { + + case 1: + + val = cx24123_readlnbreg(state, 0x0); + + switch (voltage) { + case SEC_VOLTAGE_13: + return cx24123_writelnbreg(state, 0x0, val & 0x32); /* V 13v */ + case SEC_VOLTAGE_18: + return cx24123_writelnbreg(state, 0x0, val | 0x04); /* H 18v */ + case SEC_VOLTAGE_OFF: + return cx24123_writelnbreg(state, 0x0, val & 0x30); + default: + return -EINVAL; + }; + + case 0: + + val = cx24123_readreg(state, 0x29); + + switch (voltage) { + case SEC_VOLTAGE_13: + dprintk("%s: setting voltage 13V\n", __FUNCTION__); + if (state->config->enable_lnb_voltage) + state->config->enable_lnb_voltage(fe, 1); + return cx24123_writereg(state, 0x29, val | 0x80); + case SEC_VOLTAGE_18: + dprintk("%s: setting voltage 18V\n", __FUNCTION__); + if (state->config->enable_lnb_voltage) + state->config->enable_lnb_voltage(fe, 1); + return cx24123_writereg(state, 0x29, val & 0x7f); + case SEC_VOLTAGE_OFF: + dprintk("%s: setting voltage off\n", __FUNCTION__); + if (state->config->enable_lnb_voltage) + state->config->enable_lnb_voltage(fe, 0); + return 0; + default: + return -EINVAL; + }; + } + + return 0; +} + +static int cx24123_send_diseqc_msg(struct dvb_frontend* fe, + struct dvb_diseqc_master_cmd *cmd) +{ + /* fixme: Implement diseqc */ + printk("%s: No support yet\n",__FUNCTION__); + + return -ENOTSUPP; +} + +static int cx24123_read_status(struct dvb_frontend* fe, fe_status_t* status) +{ + struct cx24123_state *state = fe->demodulator_priv; + + int sync = cx24123_readreg(state, 0x14); + int lock = cx24123_readreg(state, 0x20); + + *status = 0; + if (lock & 0x01) + *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL; + if (sync & 0x04) + *status |= FE_HAS_VITERBI; + if (sync & 0x08) + *status |= FE_HAS_CARRIER; + if (sync & 0x80) + *status |= FE_HAS_SYNC | FE_HAS_LOCK; + + return 0; +} + +/* + * Configured to return the measurement of errors in blocks, because no UCBLOCKS value + * is available, so this value doubles up to satisfy both measurements + */ +static int cx24123_read_ber(struct dvb_frontend* fe, u32* ber) +{ + struct cx24123_state *state = fe->demodulator_priv; + + state->lastber = + ((cx24123_readreg(state, 0x1c) & 0x3f) << 16) | + (cx24123_readreg(state, 0x1d) << 8 | + cx24123_readreg(state, 0x1e)); + + /* Do the signal quality processing here, it's derived from the BER. */ + /* Scale the BER from a 24bit to a SNR 16 bit where higher = better */ + if (state->lastber < 5000) + state->snr = 655*100; + else if ( (state->lastber >= 5000) && (state->lastber < 55000) ) + state->snr = 655*90; + else if ( (state->lastber >= 55000) && (state->lastber < 150000) ) + state->snr = 655*80; + else if ( (state->lastber >= 150000) && (state->lastber < 250000) ) + state->snr = 655*70; + else if ( (state->lastber >= 250000) && (state->lastber < 450000) ) + state->snr = 655*65; + else + state->snr = 0; + + *ber = state->lastber; + + return 0; +} + +static int cx24123_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength) +{ + struct cx24123_state *state = fe->demodulator_priv; + *signal_strength = cx24123_readreg(state, 0x3b) << 8; /* larger = better */ + + return 0; +} + +static int cx24123_read_snr(struct dvb_frontend* fe, u16* snr) +{ + struct cx24123_state *state = fe->demodulator_priv; + *snr = state->snr; + + return 0; +} + +static int cx24123_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) +{ + struct cx24123_state *state = fe->demodulator_priv; + *ucblocks = state->lastber; + + return 0; +} + +static int cx24123_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) +{ + struct cx24123_state *state = fe->demodulator_priv; + + if (state->config->set_ts_params) + state->config->set_ts_params(fe, 0); + + state->currentfreq=p->frequency; + state->currentsymbolrate = p->u.qpsk.symbol_rate; + + cx24123_set_inversion(state, p->inversion); + cx24123_set_fec(state, p->u.qpsk.fec_inner); + cx24123_set_symbolrate(state, p->u.qpsk.symbol_rate); + cx24123_pll_tune(fe, p); + + /* Enable automatic aquisition and reset cycle */ + cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07)); + cx24123_writereg(state, 0x00, 0x10); + cx24123_writereg(state, 0x00, 0); + + return 0; +} + +static int cx24123_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) +{ + struct cx24123_state *state = fe->demodulator_priv; + + if (cx24123_get_inversion(state, &p->inversion) != 0) { + printk("%s: Failed to get inversion status\n",__FUNCTION__); + return -EREMOTEIO; + } + if (cx24123_get_fec(state, &p->u.qpsk.fec_inner) != 0) { + printk("%s: Failed to get fec status\n",__FUNCTION__); + return -EREMOTEIO; + } + p->frequency = state->currentfreq; + p->u.qpsk.symbol_rate = state->currentsymbolrate; + + return 0; +} + +static int cx24123_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) +{ + struct cx24123_state *state = fe->demodulator_priv; + u8 val; + + switch (state->config->use_isl6421) { + case 1: + + val = cx24123_readlnbreg(state, 0x0); + + switch (tone) { + case SEC_TONE_ON: + return cx24123_writelnbreg(state, 0x0, val | 0x10); + case SEC_TONE_OFF: + return cx24123_writelnbreg(state, 0x0, val & 0x2f); + default: + printk("%s: CASE reached default with tone=%d\n", __FUNCTION__, tone); + return -EINVAL; + } + + case 0: + + val = cx24123_readreg(state, 0x29); + + switch (tone) { + case SEC_TONE_ON: + dprintk("%s: setting tone on\n", __FUNCTION__); + return cx24123_writereg(state, 0x29, val | 0x10); + case SEC_TONE_OFF: + dprintk("%s: setting tone off\n",__FUNCTION__); + return cx24123_writereg(state, 0x29, val & 0xef); + default: + printk("%s: CASE reached default with tone=%d\n", __FUNCTION__, tone); + return -EINVAL; + } + } + + return 0; +} + +static void cx24123_release(struct dvb_frontend* fe) +{ + struct cx24123_state* state = fe->demodulator_priv; + dprintk("%s\n",__FUNCTION__); + kfree(state); +} + +static struct dvb_frontend_ops cx24123_ops; + +struct dvb_frontend* cx24123_attach(const struct cx24123_config* config, + struct i2c_adapter* i2c) +{ + struct cx24123_state* state = NULL; + int ret; + + dprintk("%s\n",__FUNCTION__); + + /* allocate memory for the internal state */ + state = kmalloc(sizeof(struct cx24123_state), GFP_KERNEL); + if (state == NULL) { + printk("Unable to kmalloc\n"); + goto error; + } + + /* setup the state */ + state->config = config; + state->i2c = i2c; + memcpy(&state->ops, &cx24123_ops, sizeof(struct dvb_frontend_ops)); + state->lastber = 0; + state->snr = 0; + state->lnbreg = 0; + state->VCAarg = 0; + state->VGAarg = 0; + state->bandselectarg = 0; + state->pllarg = 0; + state->currentfreq = 0; + state->currentsymbolrate = 0; + + /* check if the demod is there */ + ret = cx24123_readreg(state, 0x00); + if ((ret != 0xd1) && (ret != 0xe1)) { + printk("Version != d1 or e1\n"); + goto error; + } + + /* create dvb_frontend */ + state->frontend.ops = &state->ops; + state->frontend.demodulator_priv = state; + return &state->frontend; + +error: + kfree(state); + + return NULL; +} + +static struct dvb_frontend_ops cx24123_ops = { + + .info = { + .name = "Conexant CX24123/CX24109", + .type = FE_QPSK, + .frequency_min = 950000, + .frequency_max = 2150000, + .frequency_stepsize = 1011, /* kHz for QPSK frontends */ + .frequency_tolerance = 29500, + .symbol_rate_min = 1000000, + .symbol_rate_max = 45000000, + .caps = FE_CAN_INVERSION_AUTO | + FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | + FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | + FE_CAN_QPSK | FE_CAN_RECOVER + }, + + .release = cx24123_release, + + .init = cx24123_initfe, + .set_frontend = cx24123_set_frontend, + .get_frontend = cx24123_get_frontend, + .read_status = cx24123_read_status, + .read_ber = cx24123_read_ber, + .read_signal_strength = cx24123_read_signal_strength, + .read_snr = cx24123_read_snr, + .read_ucblocks = cx24123_read_ucblocks, + .diseqc_send_master_cmd = cx24123_send_diseqc_msg, + .set_tone = cx24123_set_tone, + .set_voltage = cx24123_set_voltage, +}; + +module_param(debug, int, 0644); +MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); + +MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24123/cx24109 hardware"); +MODULE_AUTHOR("Steven Toth"); +MODULE_LICENSE("GPL"); + +EXPORT_SYMBOL(cx24123_attach); diff --git a/drivers/media/dvb/frontends/cx24123.h b/drivers/media/dvb/frontends/cx24123.h new file mode 100644 index 0000000..0c922b5 --- /dev/null +++ b/drivers/media/dvb/frontends/cx24123.h @@ -0,0 +1,51 @@ +/* + Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver + + Copyright (C) 2005 Steven Toth <stoth@hauppauge.com> + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#ifndef CX24123_H +#define CX24123_H + +#include <linux/dvb/frontend.h> + +struct cx24123_config +{ + /* the demodulator's i2c address */ + u8 demod_address; + + /* + cards like Hauppauge Nova-S Plus/Nova-SE2 use an Intersil ISL6421 chip + for LNB control, while KWorld DVB-S 100 use the LNBDC and LNBTone bits + from register 0x29 of the CX24123 demodulator + */ + int use_isl6421; + + /* PLL maintenance */ + int (*pll_init)(struct dvb_frontend* fe); + int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params); + + /* Need to set device param for start_dma */ + int (*set_ts_params)(struct dvb_frontend* fe, int is_punctured); + + void (*enable_lnb_voltage)(struct dvb_frontend* fe, int on); +}; + +extern struct dvb_frontend* cx24123_attach(const struct cx24123_config* config, + struct i2c_adapter* i2c); + +#endif /* CX24123_H */ diff --git a/drivers/media/dvb/frontends/dvb-pll.c b/drivers/media/dvb/frontends/dvb-pll.c index f857b86..a3d57ce 100644 --- a/drivers/media/dvb/frontends/dvb-pll.c +++ b/drivers/media/dvb/frontends/dvb-pll.c @@ -107,18 +107,19 @@ struct dvb_pll_desc dvb_pll_microtune_4042 = { }; EXPORT_SYMBOL(dvb_pll_microtune_4042); -struct dvb_pll_desc dvb_pll_thomson_dtt7611 = { - .name = "Thomson dtt7611", - .min = 44000000, - .max = 958000000, +struct dvb_pll_desc dvb_pll_thomson_dtt761x = { + /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */ + .name = "Thomson dtt761x", + .min = 57000000, + .max = 863000000, .count = 3, .entries = { - { 157250000, 44000000, 62500, 0x8e, 0x39 }, - { 454000000, 44000000, 62500, 0x8e, 0x3a }, + { 147000000, 44000000, 62500, 0x8e, 0x39 }, + { 417000000, 44000000, 62500, 0x8e, 0x3a }, { 999999999, 44000000, 62500, 0x8e, 0x3c }, }, }; -EXPORT_SYMBOL(dvb_pll_thomson_dtt7611); +EXPORT_SYMBOL(dvb_pll_thomson_dtt761x); struct dvb_pll_desc dvb_pll_unknown_1 = { .name = "unknown 1", /* used by dntv live dvb-t */ diff --git a/drivers/media/dvb/frontends/dvb-pll.h b/drivers/media/dvb/frontends/dvb-pll.h index 497d31d..24d4d2e 100644 --- a/drivers/media/dvb/frontends/dvb-pll.h +++ b/drivers/media/dvb/frontends/dvb-pll.h @@ -25,7 +25,7 @@ extern struct dvb_pll_desc dvb_pll_thomson_dtt759x; extern struct dvb_pll_desc dvb_pll_thomson_dtt7610; extern struct dvb_pll_desc dvb_pll_lg_z201; extern struct dvb_pll_desc dvb_pll_microtune_4042; -extern struct dvb_pll_desc dvb_pll_thomson_dtt7611; +extern struct dvb_pll_desc dvb_pll_thomson_dtt761x; extern struct dvb_pll_desc dvb_pll_unknown_1; extern struct dvb_pll_desc dvb_pll_tua6010xs; diff --git a/drivers/media/dvb/frontends/lgdt330x.c b/drivers/media/dvb/frontends/lgdt330x.c index cb53018..9d21464 100644 --- a/drivers/media/dvb/frontends/lgdt330x.c +++ b/drivers/media/dvb/frontends/lgdt330x.c @@ -27,6 +27,7 @@ * DViCO FusionHDTV 3 Gold-T * DViCO FusionHDTV 5 Gold * DViCO FusionHDTV 5 Lite + * DViCO FusionHDTV 5 USB Gold * Air2PC/AirStar 2 ATSC 3rd generation (HD5000) * * TODO: @@ -402,6 +403,8 @@ static int lgdt330x_set_parameters(struct dvb_frontend* fe, state->config->pll_set(fe, param); /* Keep track of the new frequency */ + /* FIXME this is the wrong way to do this... */ + /* The tuner is shared with the video4linux analog API */ state->current_frequency = param->frequency; lgdt330x_SwReset(state); diff --git a/drivers/media/dvb/frontends/nxt2002.c b/drivers/media/dvb/frontends/nxt2002.c index 52c4160..4f263e6 100644 --- a/drivers/media/dvb/frontends/nxt2002.c +++ b/drivers/media/dvb/frontends/nxt2002.c @@ -22,7 +22,8 @@ /* * This driver needs external firmware. Please use the command * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to - * download/extract it, and then copy it to /usr/lib/hotplug/firmware. + * download/extract it, and then copy it to /usr/lib/hotplug/firmware + * or /lib/firmware (depending on configuration of firmware hotplug). */ #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw" #define CRC_CCIT_MASK 0x1021 diff --git a/drivers/media/dvb/frontends/nxt6000.c b/drivers/media/dvb/frontends/nxt6000.c index a458a3b..a16eeba 100644 --- a/drivers/media/dvb/frontends/nxt6000.c +++ b/drivers/media/dvb/frontends/nxt6000.c @@ -574,11 +574,11 @@ static struct dvb_frontend_ops nxt6000_ops = { .symbol_rate_max = 9360000, /* FIXME */ .symbol_rate_tolerance = 4000, .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | - FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | - FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO | - FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO | - FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO | - FE_CAN_HIERARCHY_AUTO, + FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | + FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO | + FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO | + FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO | + FE_CAN_HIERARCHY_AUTO, }, .release = nxt6000_release, diff --git a/drivers/media/dvb/frontends/or51211.c b/drivers/media/dvb/frontends/or51211.c index 531f762..7c3aed1 100644 --- a/drivers/media/dvb/frontends/or51211.c +++ b/drivers/media/dvb/frontends/or51211.c @@ -25,7 +25,8 @@ /* * This driver needs external firmware. Please use the command * "<kerneldir>/Documentation/dvb/get_dvb_firmware or51211" to - * download/extract it, and then copy it to /usr/lib/hotplug/firmware. + * download/extract it, and then copy it to /usr/lib/hotplug/firmware + * or /lib/firmware (depending on configuration of firmware hotplug). */ #define OR51211_DEFAULT_FIRMWARE "dvb-fe-or51211.fw" @@ -112,7 +113,7 @@ static int or51211_load_firmware (struct dvb_frontend* fe, u8 tudata[585]; int i; - dprintk("Firmware is %d bytes\n",fw->size); + dprintk("Firmware is %zd bytes\n",fw->size); /* Get eprom data */ tudata[0] = 17; diff --git a/drivers/media/dvb/frontends/s5h1420.c b/drivers/media/dvb/frontends/s5h1420.c index 1871509..d694775 100644 --- a/drivers/media/dvb/frontends/s5h1420.c +++ b/drivers/media/dvb/frontends/s5h1420.c @@ -521,8 +521,8 @@ static void s5h1420_setfec_inversion(struct s5h1420_state* state, case FEC_3_4: s5h1420_writereg(state, 0x30, 0x04); - s5h1420_writereg(state, 0x31, 0x12 | inversion); - break; + s5h1420_writereg(state, 0x31, 0x12 | inversion); + break; case FEC_5_6: s5h1420_writereg(state, 0x30, 0x08); diff --git a/drivers/media/dvb/frontends/sp8870.c b/drivers/media/dvb/frontends/sp8870.c index fc06cd6..73829e6 100644 --- a/drivers/media/dvb/frontends/sp8870.c +++ b/drivers/media/dvb/frontends/sp8870.c @@ -22,7 +22,8 @@ /* * This driver needs external firmware. Please use the command * "<kerneldir>/Documentation/dvb/get_dvb_firmware alps_tdlb7" to - * download/extract it, and then copy it to /usr/lib/hotplug/firmware. + * download/extract it, and then copy it to /usr/lib/hotplug/firmware + * or /lib/firmware (depending on configuration of firmware hotplug). */ #define SP8870_DEFAULT_FIRMWARE "dvb-fe-sp8870.fw" diff --git a/drivers/media/dvb/frontends/sp887x.c b/drivers/media/dvb/frontends/sp887x.c index e3b6657..eb8a602 100644 --- a/drivers/media/dvb/frontends/sp887x.c +++ b/drivers/media/dvb/frontends/sp887x.c @@ -5,7 +5,8 @@ /* * This driver needs external firmware. Please use the command * "<kerneldir>/Documentation/dvb/get_dvb_firmware sp887x" to - * download/extract it, and then copy it to /usr/lib/hotplug/firmware. + * download/extract it, and then copy it to /usr/lib/hotplug/firmware + * or /lib/firmware (depending on configuration of firmware hotplug). */ #define SP887X_DEFAULT_FIRMWARE "dvb-fe-sp887x.fw" @@ -581,7 +582,7 @@ static struct dvb_frontend_ops sp887x_ops = { .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | - FE_CAN_RECOVER + FE_CAN_RECOVER }, .release = sp887x_release, diff --git a/drivers/media/dvb/frontends/stv0299.c b/drivers/media/dvb/frontends/stv0299.c index 177d71d..5bcd00f 100644 --- a/drivers/media/dvb/frontends/stv0299.c +++ b/drivers/media/dvb/frontends/stv0299.c @@ -131,6 +131,13 @@ static int stv0299_readregs (struct stv0299_state* state, u8 reg1, u8 *b, u8 len return ret == 2 ? 0 : ret; } +int stv0299_enable_plli2c (struct dvb_frontend* fe) +{ + struct stv0299_state* state = fe->demodulator_priv; + + return stv0299_writeregI(state, 0x05, 0xb5); /* enable i2c repeater on stv0299 */ +} + static int stv0299_set_FEC (struct stv0299_state* state, fe_code_rate_t fec) { dprintk ("%s\n", __FUNCTION__); @@ -387,7 +394,7 @@ static int stv0299_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t voltag }; } -static int stv0299_send_legacy_dish_cmd (struct dvb_frontend* fe, u32 cmd) +static int stv0299_send_legacy_dish_cmd (struct dvb_frontend* fe, unsigned long cmd) { struct stv0299_state* state = fe->demodulator_priv; u8 reg0x08; @@ -407,7 +414,7 @@ static int stv0299_send_legacy_dish_cmd (struct dvb_frontend* fe, u32 cmd) cmd = cmd << 1; if (debug_legacy_dish_switch) - printk ("%s switch command: 0x%04x\n",__FUNCTION__, cmd); + printk ("%s switch command: 0x%04lx\n",__FUNCTION__, cmd); do_gettimeofday (&nexttime); if (debug_legacy_dish_switch) @@ -717,5 +724,6 @@ MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Peter Schildmann, Felix Domke, " "Andreas Oberritter, Andrew de Quincey, Kenneth Aafløy"); MODULE_LICENSE("GPL"); +EXPORT_SYMBOL(stv0299_enable_plli2c); EXPORT_SYMBOL(stv0299_writereg); EXPORT_SYMBOL(stv0299_attach); diff --git a/drivers/media/dvb/frontends/stv0299.h b/drivers/media/dvb/frontends/stv0299.h index 9af3d71..32c87b4 100644 --- a/drivers/media/dvb/frontends/stv0299.h +++ b/drivers/media/dvb/frontends/stv0299.h @@ -94,6 +94,7 @@ struct stv0299_config }; extern int stv0299_writereg (struct dvb_frontend* fe, u8 reg, u8 data); +extern int stv0299_enable_plli2c (struct dvb_frontend* fe); extern struct dvb_frontend* stv0299_attach(const struct stv0299_config* config, struct i2c_adapter* i2c); diff --git a/drivers/media/dvb/frontends/tda10021.c b/drivers/media/dvb/frontends/tda10021.c index 425cd19..21255ca 100644 --- a/drivers/media/dvb/frontends/tda10021.c +++ b/drivers/media/dvb/frontends/tda10021.c @@ -95,7 +95,7 @@ static u8 tda10021_readreg (struct tda10021_state* state, u8 reg) u8 b0 [] = { reg }; u8 b1 [] = { 0 }; struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 }, - { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } }; + { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } }; int ret; ret = i2c_transfer (state->i2c, msg, 2); @@ -434,7 +434,7 @@ static struct dvb_frontend_ops tda10021_ops = { .frequency_max = 858000000, .symbol_rate_min = (XIN/2)/64, /* SACLK/64 == (XIN/2)/64 */ .symbol_rate_max = (XIN/2)/4, /* SACLK/4 */ - #if 0 +#if 0 .frequency_tolerance = ???, .symbol_rate_tolerance = ???, /* ppm */ /* == 8% (spec p. 5) */ #endif diff --git a/drivers/media/dvb/frontends/tda1004x.c b/drivers/media/dvb/frontends/tda1004x.c index dd02aff..c63e9a5 100644 --- a/drivers/media/dvb/frontends/tda1004x.c +++ b/drivers/media/dvb/frontends/tda1004x.c @@ -23,7 +23,8 @@ * This driver needs external firmware. Please use the commands * "<kerneldir>/Documentation/dvb/get_dvb_firmware tda10045", * "<kerneldir>/Documentation/dvb/get_dvb_firmware tda10046" to - * download/extract them, and then copy them to /usr/lib/hotplug/firmware. + * download/extract them, and then copy them to /usr/lib/hotplug/firmware + * or /lib/firmware (depending on configuration of firmware hotplug). */ #define TDA10045_DEFAULT_FIRMWARE "dvb-fe-tda10045.fw" #define TDA10046_DEFAULT_FIRMWARE "dvb-fe-tda10046.fw" @@ -271,32 +272,57 @@ static int tda10045h_set_bandwidth(struct tda1004x_state *state, static int tda10046h_set_bandwidth(struct tda1004x_state *state, fe_bandwidth_t bandwidth) { - static u8 bandwidth_6mhz[] = { 0x80, 0x15, 0xfe, 0xab, 0x8e }; - static u8 bandwidth_7mhz[] = { 0x6e, 0x02, 0x53, 0xc8, 0x25 }; - static u8 bandwidth_8mhz[] = { 0x60, 0x12, 0xa8, 0xe4, 0xbd }; - + static u8 bandwidth_6mhz_53M[] = { 0x7b, 0x2e, 0x11, 0xf0, 0xd2 }; + static u8 bandwidth_7mhz_53M[] = { 0x6a, 0x02, 0x6a, 0x43, 0x9f }; + static u8 bandwidth_8mhz_53M[] = { 0x5c, 0x32, 0xc2, 0x96, 0x6d }; + + static u8 bandwidth_6mhz_48M[] = { 0x70, 0x02, 0x49, 0x24, 0x92 }; + static u8 bandwidth_7mhz_48M[] = { 0x60, 0x02, 0xaa, 0xaa, 0xab }; + static u8 bandwidth_8mhz_48M[] = { 0x54, 0x03, 0x0c, 0x30, 0xc3 }; + int tda10046_clk53m; + + if ((state->config->if_freq == TDA10046_FREQ_045) || + (state->config->if_freq == TDA10046_FREQ_052)) + tda10046_clk53m = 0; + else + tda10046_clk53m = 1; switch (bandwidth) { case BANDWIDTH_6_MHZ: - tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_6mhz, sizeof(bandwidth_6mhz)); + if (tda10046_clk53m) + tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_6mhz_53M, + sizeof(bandwidth_6mhz_53M)); + else + tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_6mhz_48M, + sizeof(bandwidth_6mhz_48M)); if (state->config->if_freq == TDA10046_FREQ_045) { - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x09); - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x4f); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0a); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0xab); } break; case BANDWIDTH_7_MHZ: - tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_7mhz, sizeof(bandwidth_7mhz)); + if (tda10046_clk53m) + tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_7mhz_53M, + sizeof(bandwidth_7mhz_53M)); + else + tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_7mhz_48M, + sizeof(bandwidth_7mhz_48M)); if (state->config->if_freq == TDA10046_FREQ_045) { - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0a); - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x79); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0c); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x00); } break; case BANDWIDTH_8_MHZ: - tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_8mhz, sizeof(bandwidth_8mhz)); + if (tda10046_clk53m) + tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_8mhz_53M, + sizeof(bandwidth_8mhz_53M)); + else + tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_8mhz_48M, + sizeof(bandwidth_8mhz_48M)); if (state->config->if_freq == TDA10046_FREQ_045) { - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0b); - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0xa3); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0d); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x55); } break; @@ -418,9 +444,22 @@ static int tda10045_fwupload(struct dvb_frontend* fe) static void tda10046_init_plls(struct dvb_frontend* fe) { struct tda1004x_state* state = fe->demodulator_priv; + int tda10046_clk53m; + + if ((state->config->if_freq == TDA10046_FREQ_045) || + (state->config->if_freq == TDA10046_FREQ_052)) + tda10046_clk53m = 0; + else + tda10046_clk53m = 1; tda1004x_write_byteI(state, TDA10046H_CONFPLL1, 0xf0); - tda1004x_write_byteI(state, TDA10046H_CONFPLL2, 0x0a); // PLL M = 10 + if(tda10046_clk53m) { + printk(KERN_INFO "tda1004x: setting up plls for 53MHz sampling clock\n"); + tda1004x_write_byteI(state, TDA10046H_CONFPLL2, 0x08); // PLL M = 8 + } else { + printk(KERN_INFO "tda1004x: setting up plls for 48MHz sampling clock\n"); + tda1004x_write_byteI(state, TDA10046H_CONFPLL2, 0x03); // PLL M = 3 + } if (state->config->xtal_freq == TDA10046_XTAL_4M ) { dprintk("%s: setting up PLLs for a 4 MHz Xtal\n", __FUNCTION__); tda1004x_write_byteI(state, TDA10046H_CONFPLL3, 0); // PLL P = N = 0 @@ -428,26 +467,32 @@ static void tda10046_init_plls(struct dvb_frontend* fe) dprintk("%s: setting up PLLs for a 16 MHz Xtal\n", __FUNCTION__); tda1004x_write_byteI(state, TDA10046H_CONFPLL3, 3); // PLL P = 0, N = 3 } - tda1004x_write_byteI(state, TDA10046H_FREQ_OFFSET, 99); + if(tda10046_clk53m) + tda1004x_write_byteI(state, TDA10046H_FREQ_OFFSET, 0x67); + else + tda1004x_write_byteI(state, TDA10046H_FREQ_OFFSET, 0x72); + /* Note clock frequency is handled implicitly */ switch (state->config->if_freq) { - case TDA10046_FREQ_3617: - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0xd4); - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x2c); - break; - case TDA10046_FREQ_3613: - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0xd4); - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x13); - break; case TDA10046_FREQ_045: - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0b); - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0xa3); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0c); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x00); break; case TDA10046_FREQ_052: - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0c); - tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x06); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0d); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0xc7); + break; + case TDA10046_FREQ_3617: + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0xd7); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x59); + break; + case TDA10046_FREQ_3613: + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0xd7); + tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x3f); break; } tda10046h_set_bandwidth(state, BANDWIDTH_8_MHZ); // default bandwidth 8 MHz + /* let the PLLs settle */ + msleep(120); } static int tda10046_fwupload(struct dvb_frontend* fe) @@ -462,13 +507,13 @@ static int tda10046_fwupload(struct dvb_frontend* fe) /* let the clocks recover from sleep */ msleep(5); + /* The PLLs need to be reprogrammed after sleep */ + tda10046_init_plls(fe); + /* don't re-upload unless necessary */ if (tda1004x_check_upload_ok(state) == 0) return 0; - /* set parameters */ - tda10046_init_plls(fe); - if (state->config->request_firmware != NULL) { /* request the firmware, this will block until someone uploads it */ printk(KERN_INFO "tda1004x: waiting for firmware upload...\n"); @@ -484,7 +529,6 @@ static int tda10046_fwupload(struct dvb_frontend* fe) return ret; } else { /* boot from firmware eeprom */ - /* Hac Note: we might need to do some GPIO Magic here */ printk(KERN_INFO "tda1004x: booting from eeprom\n"); tda1004x_write_mask(state, TDA1004X_CONFC4, 4, 4); msleep(300); @@ -606,10 +650,9 @@ static int tda10046_init(struct dvb_frontend* fe) // tda setup tda1004x_write_mask(state, TDA1004X_CONFC4, 0x20, 0); // disable DSP watchdog timer - tda1004x_write_byteI(state, TDA1004X_AUTO, 7); // select HP stream - tda1004x_write_byteI(state, TDA1004X_CONFC1, 8); // disable pulse killer + tda1004x_write_byteI(state, TDA1004X_AUTO, 0x87); // 100 ppm crystal, select HP stream + tda1004x_write_byteI(state, TDA1004X_CONFC1, 8); // disable pulse killer - tda10046_init_plls(fe); switch (state->config->agc_config) { case TDA10046_AGC_DEFAULT: tda1004x_write_byteI(state, TDA10046H_AGC_CONF, 0x00); // AGC setup @@ -626,25 +669,22 @@ static int tda10046_init(struct dvb_frontend* fe) case TDA10046_AGC_TDA827X: tda1004x_write_byteI(state, TDA10046H_AGC_CONF, 0x02); // AGC setup tda1004x_write_byteI(state, TDA10046H_AGC_THR, 0x70); // AGC Threshold - tda1004x_write_byteI(state, TDA10046H_AGC_RENORM, 0x0E); // Gain Renormalize - tda1004x_write_byteI(state, TDA10046H_CONF_POLARITY, 0x60); // set AGC polarities + tda1004x_write_byteI(state, TDA10046H_AGC_RENORM, 0x08); // Gain Renormalize + tda1004x_write_byteI(state, TDA10046H_CONF_POLARITY, 0x6a); // set AGC polarities break; } + tda1004x_write_byteI(state, TDA1004X_CONFADC2, 0x38); tda1004x_write_byteI(state, TDA10046H_CONF_TRISTATE1, 0x61); // Turn both AGC outputs on tda1004x_write_byteI(state, TDA10046H_AGC_TUN_MIN, 0); // } tda1004x_write_byteI(state, TDA10046H_AGC_TUN_MAX, 0xff); // } AGC min/max values tda1004x_write_byteI(state, TDA10046H_AGC_IF_MIN, 0); // } tda1004x_write_byteI(state, TDA10046H_AGC_IF_MAX, 0xff); // } - tda1004x_write_byteI(state, TDA10046H_AGC_GAINS, 1); // IF gain 2, TUN gain 1 + tda1004x_write_byteI(state, TDA10046H_AGC_GAINS, 0x12); // IF gain 2, TUN gain 1 tda1004x_write_byteI(state, TDA10046H_CVBER_CTRL, 0x1a); // 10^6 VBER measurement bits tda1004x_write_byteI(state, TDA1004X_CONF_TS1, 7); // MPEG2 interface config tda1004x_write_byteI(state, TDA1004X_CONF_TS2, 0xc0); // MPEG2 interface config tda1004x_write_mask(state, 0x3a, 0x80, state->config->invert_oclk << 7); - tda1004x_write_byteI(state, TDA10046H_CONF_TRISTATE2, 0xe1); // tristate setup - tda1004x_write_byteI(state, TDA10046H_GPIO_OUT_SEL, 0xcc); // GPIO output config - tda1004x_write_byteI(state, TDA10046H_GPIO_SELECT, 8); // GPIO select - state->initialised = 1; return 0; } @@ -686,9 +726,9 @@ static int tda1004x_set_fe(struct dvb_frontend* fe, // Set standard params.. or put them to auto if ((fe_params->u.ofdm.code_rate_HP == FEC_AUTO) || - (fe_params->u.ofdm.code_rate_LP == FEC_AUTO) || - (fe_params->u.ofdm.constellation == QAM_AUTO) || - (fe_params->u.ofdm.hierarchy_information == HIERARCHY_AUTO)) { + (fe_params->u.ofdm.code_rate_LP == FEC_AUTO) || + (fe_params->u.ofdm.constellation == QAM_AUTO) || + (fe_params->u.ofdm.hierarchy_information == HIERARCHY_AUTO)) { tda1004x_write_mask(state, TDA1004X_AUTO, 1, 1); // enable auto tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x03, 0); // turn off constellation bits tda1004x_write_mask(state, TDA1004X_IN_CONF1, 0x60, 0); // turn off hierarchy bits @@ -851,6 +891,7 @@ static int tda1004x_set_fe(struct dvb_frontend* fe, static int tda1004x_get_fe(struct dvb_frontend* fe, struct dvb_frontend_parameters *fe_params) { struct tda1004x_state* state = fe->demodulator_priv; + dprintk("%s\n", __FUNCTION__); // inversion status @@ -875,16 +916,18 @@ static int tda1004x_get_fe(struct dvb_frontend* fe, struct dvb_frontend_paramete break; } break; - case TDA1004X_DEMOD_TDA10046: switch (tda1004x_read_byte(state, TDA10046H_TIME_WREF1)) { - case 0x60: + case 0x5c: + case 0x54: fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ; break; - case 0x6e: + case 0x6a: + case 0x60: fe_params->u.ofdm.bandwidth = BANDWIDTH_7_MHZ; break; - case 0x80: + case 0x7b: + case 0x70: fe_params->u.ofdm.bandwidth = BANDWIDTH_6_MHZ; break; } |