diff options
Diffstat (limited to 'drivers/media/tdmb/tcc3170/inc/tcbd_feature.h')
| -rw-r--r-- | drivers/media/tdmb/tcc3170/inc/tcbd_feature.h | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/media/tdmb/tcc3170/inc/tcbd_feature.h b/drivers/media/tdmb/tcc3170/inc/tcbd_feature.h index a8bf7fc..53fb880 100644 --- a/drivers/media/tdmb/tcc3170/inc/tcbd_feature.h +++ b/drivers/media/tdmb/tcc3170/inc/tcbd_feature.h @@ -25,19 +25,25 @@ #define __AGC_TABLE_IN_DSP__ - #define __CSPI_ONLY__ #undef __I2C_STS__ #undef __ALWAYS_FIC_ON__ #undef __CALLBACK_BUFFER_HEADER__ +#if defined(__I2C_STS__) +#define __STATUS_IN_REGISTER__ +#else /*__I2C_STS__*/ #undef __STATUS_IN_REGISTER__ #define __STATUS_IN_STREAM__ -#undef __CALC_INTRRUPT_THRESHOLD__ +#endif /*!__I2C_STS__*/ +#if defined(__CSPI_ONLY__) #define __READ_FIXED_LENGTH__ #undef __READ_VARIABLE_LENGTH__ +#endif /*__CSPI_ONLY__*/ + +#undef __DEBUG_DSP_ROM__ #define TCBD_MAX_NUM_SERVICE 6 @@ -50,24 +56,31 @@ #define TCBD_CHIPID_VALUE (0x37) #if defined(__STATUS_IN_REGISTER__) +#if defined(__CSPI_ONLY__) #define TCBD_THRESHOLD_FIC\ - (TCBD_FIC_SIZE + TCBD_OP_HEADER_SIZE) + (TCBD_FIC_SIZE + TCBD_STATUS_SIZE + TCBD_OP_HEADER_SIZE*2) +#elif defined(__I2C_STS__) +#define TCBD_THRESHOLD_FIC (TCBD_FIC_SIZE) +#else /*__I2C_STS__*/ +#error "you must define __I2C_STS__ or __CSPI_ONLY__" +#endif /*!__CSPI_ONLY__ && !__I2C_STS__*/ #else /* __STATUS_IN_REGISTER__ */ #define TCBD_THRESHOLD_FIC\ (TCBD_FIC_SIZE+TCBD_STATUS_SIZE+TCBD_OP_HEADER_SIZE*2) #endif /* !__STATUS_IN_REGISTER__ */ #if defined(__CSPI_ONLY__) -#define TCBD_BUFFER_A_SIZE (TCBD_THRESHOLD_FIC*5) -#define TCBD_BUFFER_B_SIZE (TCBD_MAX_FIFO_SIZE - TCBD_BUFFER_A_SIZE) +#define TCBD_BUFFER_A_SIZE (TCBD_MAX_FIFO_SIZE) +#define TCBD_BUFFER_B_SIZE (0x0) #define TCBD_BUFFER_C_SIZE (0x0) #define TCBD_BUFFER_D_SIZE (0x0) -#define TCBD_MAX_THRESHOLD (((TCBD_MAX_FIFO_SIZE>>1)>>2)<<2) +#define TCBD_MAX_THRESHOLD (((1024*7)>>2)<<2) #elif defined(__I2C_STS__) #define TCBD_BUFFER_A_SIZE (TCBD_THRESHOLD_FIC) -#define TCBD_BUFFER_B_SIZE (1024*6) +#define TCBD_BUFFER_B_SIZE \ + (((TCBD_MAX_FIFO_SIZE-TCBD_BUFFER_A_SIZE)>>2)<<2) #define TCBD_BUFFER_C_SIZE (0x0) #define TCBD_BUFFER_D_SIZE (0x0) @@ -92,19 +105,6 @@ #define PHY_MEM_ADDR_D_END\ (PHY_MEM_ADDR_D_START+TCBD_BUFFER_D_SIZE-1) -#define DP_CFG_OPSET1 (1144) -#define DP_CFG_OPSET2 (204) - -#define DP_CFG_1_DATA0 (PHY_BASE_ADDR + 0xd000) -#define DP_CFG_2_DATA0 (DP_CFG_1_DATA0 + DP_CFG_OPSET1) -#define DP_CFG_1_DATA1 (DP_CFG_2_DATA0 + DP_CFG_OPSET2) -#define DP_CFG_2_DATA1 (DP_CFG_1_DATA1 + DP_CFG_OPSET1) -#define DP_CFG_1_DATA2 (DP_CFG_2_DATA1 + DP_CFG_OPSET2) -#define DP_CFG_2_DATA2 (DP_CFG_1_DATA2 + DP_CFG_OPSET1) -#define DP_CFG_1_DATA3 (DP_CFG_2_DATA2 + DP_CFG_OPSET2) -#define DP_CFG_2_DATA3 (DP_CFG_1_DATA3 + DP_CFG_OPSET1) - - /* CODE Memory Setting */ #define START_PC (0x0000) #define START_PC_OFFSET (0x8000) |