aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/bcmdhd/include/sdio.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/wireless/bcmdhd/include/sdio.h')
-rw-r--r--drivers/net/wireless/bcmdhd/include/sdio.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/wireless/bcmdhd/include/sdio.h b/drivers/net/wireless/bcmdhd/include/sdio.h
index b8eee1f..5b9f737 100644
--- a/drivers/net/wireless/bcmdhd/include/sdio.h
+++ b/drivers/net/wireless/bcmdhd/include/sdio.h
@@ -2,7 +2,7 @@
* SDIO spec header file
* Protocol and standard (common) device definitions
*
- * Copyright (C) 1999-2012, Broadcom Corporation
+ * Copyright (C) 1999-2014, Broadcom Corporation
*
* Unless you and Broadcom execute a separate written software license
* agreement governing use of this software, this software is licensed to you
@@ -22,7 +22,7 @@
* software in any way with any other Broadcom software provided under a license
* other than the GPL, without Broadcom's express prior written consent.
*
- * $Id: sdio.h 308973 2012-01-18 04:19:34Z $
+ * $Id: sdio.h 416730 2013-08-06 09:33:19Z $
*/
#ifndef _SDIO_H
@@ -84,7 +84,7 @@ typedef volatile struct {
#define SDIOD_CCCR_INTR_EXTN 0x16
/* Broadcom extensions (corerev >= 1) */
-#define SDIOD_CCCR_BRCM_CARDCAP 0xf0
+#define SDIOD_CCCR_BRCM_CARDCAP 0xf0
#define SDIOD_CCCR_BRCM_CARDCAP_CMD14_SUPPORT 0x02
#define SDIOD_CCCR_BRCM_CARDCAP_CMD14_EXT 0x04
#define SDIOD_CCCR_BRCM_CARDCAP_CMD_NODEC 0x08
@@ -94,6 +94,7 @@ typedef volatile struct {
/* cccr_sdio_rev */
#define SDIO_REV_SDIOID_MASK 0xf0 /* SDIO spec revision number */
#define SDIO_REV_CCCRID_MASK 0x0f /* CCCR format version number */
+#define SDIO_SPEC_VERSION_3_0 0x40 /* SDIO spec version 3.0 */
/* sd_rev */
#define SD_REV_PHY_MASK 0x0f /* SD format version number */
@@ -144,6 +145,7 @@ typedef volatile struct {
/* speed_control (control device entry into high-speed clocking mode) */
#define SDIO_SPEED_SHS 0x01 /* supports high-speed [clocking] mode (RO) */
#define SDIO_SPEED_EHS 0x02 /* enable high-speed [clocking] mode (RW) */
+#define SDIO_SPEED_UHSI_DDR50 0x08
/* for setting bus speed in card: 0x13h */
#define SDIO_BUS_SPEED_UHSISEL_M BITFIELD_MASK(3)