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path: root/drivers/staging/tidspbridge/core/ue_deh.c
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Diffstat (limited to 'drivers/staging/tidspbridge/core/ue_deh.c')
-rw-r--r--drivers/staging/tidspbridge/core/ue_deh.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/staging/tidspbridge/core/ue_deh.c b/drivers/staging/tidspbridge/core/ue_deh.c
index 875a65c..bc2feff 100644
--- a/drivers/staging/tidspbridge/core/ue_deh.c
+++ b/drivers/staging/tidspbridge/core/ue_deh.c
@@ -59,9 +59,9 @@ static irqreturn_t mmu_fault_isr(int irq, void *data)
return IRQ_HANDLED;
}
- hw_mmu_event_status(resources->dw_dmmu_base, &event);
+ hw_mmu_event_status(resources->dmmu_base, &event);
if (event == HW_MMU_TRANSLATION_FAULT) {
- hw_mmu_fault_addr_read(resources->dw_dmmu_base, &fault_addr);
+ hw_mmu_fault_addr_read(resources->dmmu_base, &fault_addr);
dev_dbg(bridge, "%s: event=0x%x, fault_addr=0x%x\n", __func__,
event, fault_addr);
/*
@@ -73,10 +73,10 @@ static irqreturn_t mmu_fault_isr(int irq, void *data)
/* Disable the MMU events, else once we clear it will
* start to raise INTs again */
- hw_mmu_event_disable(resources->dw_dmmu_base,
+ hw_mmu_event_disable(resources->dmmu_base,
HW_MMU_TRANSLATION_FAULT);
} else {
- hw_mmu_event_disable(resources->dw_dmmu_base,
+ hw_mmu_event_disable(resources->dmmu_base,
HW_MMU_ALL_INTERRUPTS);
}
return IRQ_HANDLED;
@@ -185,10 +185,10 @@ static void mmu_fault_print_stack(struct bridge_dev_context *dev_context)
* access entry #0. Then add a new entry so that the DSP OS
* can continue in order to dump the stack.
*/
- hw_mmu_twl_disable(resources->dw_dmmu_base);
- hw_mmu_tlb_flush_all(resources->dw_dmmu_base);
+ hw_mmu_twl_disable(resources->dmmu_base);
+ hw_mmu_tlb_flush_all(resources->dmmu_base);
- hw_mmu_tlb_add(resources->dw_dmmu_base,
+ hw_mmu_tlb_add(resources->dmmu_base,
virt_to_phys(dummy_va_addr), fault_addr,
HW_PAGE_SIZE4KB, 1,
&map_attrs, HW_SET, HW_SET);
@@ -198,12 +198,12 @@ static void mmu_fault_print_stack(struct bridge_dev_context *dev_context)
dsp_gpt_wait_overflow(DSP_CLK_GPT8, 0xfffffffe);
/* Clear MMU interrupt */
- hw_mmu_event_ack(resources->dw_dmmu_base,
+ hw_mmu_event_ack(resources->dmmu_base,
HW_MMU_TRANSLATION_FAULT);
dump_dsp_stack(dev_context);
dsp_clk_disable(DSP_CLK_GPT8);
- hw_mmu_disable(resources->dw_dmmu_base);
+ hw_mmu_disable(resources->dmmu_base);
free_page((unsigned long)dummy_va_addr);
}
#endif