diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sh/bug.h | 92 | ||||
-rw-r--r-- | include/asm-sh/clock.h | 32 | ||||
-rw-r--r-- | include/asm-sh/cpu-sh3/mmu_context.h | 1 | ||||
-rw-r--r-- | include/asm-sh/cpu-sh4/freq.h | 8 | ||||
-rw-r--r-- | include/asm-sh/irq.h | 91 | ||||
-rw-r--r-- | include/asm-sh/kdebug.h | 35 | ||||
-rw-r--r-- | include/asm-sh/kexec.h | 42 | ||||
-rw-r--r-- | include/asm-sh/kgdb.h | 51 | ||||
-rw-r--r-- | include/asm-sh/lboxre2.h | 27 | ||||
-rw-r--r-- | include/asm-sh/mmu_context.h | 6 | ||||
-rw-r--r-- | include/asm-sh/page.h | 10 | ||||
-rw-r--r-- | include/asm-sh/param.h | 2 | ||||
-rw-r--r-- | include/asm-sh/pci.h | 2 | ||||
-rw-r--r-- | include/asm-sh/processor.h | 2 | ||||
-rw-r--r-- | include/asm-sh/r7780rp.h | 76 | ||||
-rw-r--r-- | include/asm-sh/se.h | 4 | ||||
-rw-r--r-- | include/asm-sh/se7722.h | 118 | ||||
-rw-r--r-- | include/asm-sh/se7751.h | 2 | ||||
-rw-r--r-- | include/asm-sh/se7780.h | 108 | ||||
-rw-r--r-- | include/asm-sh/stat.h | 19 | ||||
-rw-r--r-- | include/asm-sh/system.h | 3 |
21 files changed, 523 insertions, 208 deletions
diff --git a/include/asm-sh/bug.h b/include/asm-sh/bug.h index 2f89dd0..794c36d 100644 --- a/include/asm-sh/bug.h +++ b/include/asm-sh/bug.h @@ -2,50 +2,80 @@ #define __ASM_SH_BUG_H #ifdef CONFIG_BUG - -struct bug_frame { - unsigned short opcode; - unsigned short line; - const char *file; - const char *func; -}; - -struct pt_regs; - -extern void handle_BUG(struct pt_regs *); +#define HAVE_ARCH_BUG +#define HAVE_ARCH_WARN_ON #define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ +/** + * _EMIT_BUG_ENTRY + * %1 - __FILE__ + * %2 - __LINE__ + * %3 - trap type + * %4 - sizeof(struct bug_entry) + * + * The trapa opcode itself sits in %0. + * The %O notation is used to avoid # generation. + * + * The offending file and line are encoded in the __bug_table section. + */ #ifdef CONFIG_DEBUG_BUGVERBOSE +#define _EMIT_BUG_ENTRY \ + "\t.pushsection __bug_table,\"a\"\n" \ + "2:\t.long 1b, %O1\n" \ + "\t.short %O2, %O3\n" \ + "\t.org 2b+%O4\n" \ + "\t.popsection\n" +#else +#define _EMIT_BUG_ENTRY \ + "\t.pushsection __bug_table,\"a\"\n" \ + "2:\t.long 1b\n" \ + "\t.short %O3\n" \ + "\t.org 2b+%O4\n" \ + "\t.popsection\n" +#endif #define BUG() \ do { \ __asm__ __volatile__ ( \ - ".align 2\n\t" \ - ".short %O0\n\t" \ - ".short %O1\n\t" \ - ".long %O2\n\t" \ - ".long %O3\n\t" \ - : \ - : "n" (TRAPA_BUG_OPCODE), \ - "i" (__LINE__), "X" (__FILE__), \ - "X" (__FUNCTION__)); \ + "1:\t.short %O0\n" \ + _EMIT_BUG_ENTRY \ + : \ + : "n" (TRAPA_BUG_OPCODE), \ + "i" (__FILE__), \ + "i" (__LINE__), "i" (0), \ + "i" (sizeof(struct bug_entry))); \ } while (0) -#else - -#define BUG() \ -do { \ - __asm__ __volatile__ ( \ - ".align 2\n\t" \ - ".short %O0\n\t" \ - : \ - : "n" (TRAPA_BUG_OPCODE)); \ +#define __WARN() \ +do { \ + __asm__ __volatile__ ( \ + "1:\t.short %O0\n" \ + _EMIT_BUG_ENTRY \ + : \ + : "n" (TRAPA_BUG_OPCODE), \ + "i" (__FILE__), \ + "i" (__LINE__), \ + "i" (BUGFLAG_WARNING), \ + "i" (sizeof(struct bug_entry))); \ } while (0) -#endif /* CONFIG_DEBUG_BUGVERBOSE */ +#define WARN_ON(x) ({ \ + typeof(x) __ret_warn_on = (x); \ + if (__builtin_constant_p(__ret_warn_on)) { \ + if (__ret_warn_on) \ + __WARN(); \ + } else { \ + if (unlikely(__ret_warn_on)) \ + __WARN(); \ + } \ + unlikely(__ret_warn_on); \ +}) -#define HAVE_ARCH_BUG +struct pt_regs; + +/* arch/sh/kernel/traps.c */ +void handle_BUG(struct pt_regs *); #endif /* CONFIG_BUG */ diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h index 1df9280..386d797 100644 --- a/include/asm-sh/clock.h +++ b/include/asm-sh/clock.h @@ -13,7 +13,7 @@ struct clk_ops { void (*enable)(struct clk *clk); void (*disable)(struct clk *clk); void (*recalc)(struct clk *clk); - int (*set_rate)(struct clk *clk, unsigned long rate); + int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); }; struct clk { @@ -48,6 +48,34 @@ void clk_recalc_rate(struct clk *); int clk_register(struct clk *); void clk_unregister(struct clk *); -int show_clocks(struct seq_file *m); +/* the exported API, in addition to clk_set_rate */ +/** + * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter + * @clk: clock source + * @rate: desired clock rate in Hz + * @algo_id: algorithm id to be passed down to ops->set_rate + * + * Returns success (0) or negative errno. + */ +int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id); +enum clk_sh_algo_id { + NO_CHANGE = 0, + + IUS_N1_N1, + IUS_322, + IUS_522, + IUS_N11, + + SB_N1, + + SB3_N1, + SB3_32, + SB3_43, + SB3_54, + + BP_N1, + + IP_N1, +}; #endif /* __ASM_SH_CLOCK_H */ diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h index bccb7dd..4704e86 100644 --- a/include/asm-sh/cpu-sh3/mmu_context.h +++ b/include/asm-sh/cpu-sh3/mmu_context.h @@ -32,6 +32,7 @@ defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7300) || \ defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7712) || \ defined(CONFIG_CPU_SUBTYPE_SH7710) #define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ #else diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h index 602d061..86564e7 100644 --- a/include/asm-sh/cpu-sh4/freq.h +++ b/include/asm-sh/cpu-sh4/freq.h @@ -12,8 +12,16 @@ #if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722) #define FRQCR 0xa4150000 +#define VCLKCR 0xa4150004 +#define SCLKACR 0xa4150008 +#define SCLKBCR 0xa415000c +#define IrDACLKCR 0xa4150010 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) #define FRQCR 0xffc80000 +#elif defined(CONFIG_CPU_SUBTYPE_SH7785) +#define FRQCR0 0xffc80000 +#define FRQCR1 0xffc80004 +#define FRQMR1 0xffc80014 #else #define FRQCR 0xffc00000 #endif diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index afe188f..e81bf21 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -2,94 +2,13 @@ #define __ASM_SH_IRQ_H #include <asm/machvec.h> -#include <asm/ptrace.h> /* for pt_regs */ -/* NR_IRQS is made from three components: - * 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules - * 2. PINT_NR_IRQS - number of PINT interrupts - * 3. OFFCHIP_NR_IRQS - numbe of IRQs from off-chip peripherial modules +/* + * A sane default based on a reasonable vector table size, platforms are + * advised to cap this at the hard limit that they're interested in + * through the machvec. */ - -/* 1. ONCHIP_NR_IRQS */ -#if defined(CONFIG_CPU_SUBTYPE_SH7604) -# define ONCHIP_NR_IRQS 24 // Actually 21 -#elif defined(CONFIG_CPU_SUBTYPE_SH7707) -# define ONCHIP_NR_IRQS 64 -# define PINT_NR_IRQS 16 -#elif defined(CONFIG_CPU_SUBTYPE_SH7708) -# define ONCHIP_NR_IRQS 32 -#elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \ - defined(CONFIG_CPU_SUBTYPE_SH7706) || \ - defined(CONFIG_CPU_SUBTYPE_SH7705) -# define ONCHIP_NR_IRQS 64 // Actually 61 -# define PINT_NR_IRQS 16 -#elif defined(CONFIG_CPU_SUBTYPE_SH7710) -# define ONCHIP_NR_IRQS 104 -#elif defined(CONFIG_CPU_SUBTYPE_SH7750) -# define ONCHIP_NR_IRQS 48 // Actually 44 -#elif defined(CONFIG_CPU_SUBTYPE_SH7751) -# define ONCHIP_NR_IRQS 72 -#elif defined(CONFIG_CPU_SUBTYPE_SH7760) -# define ONCHIP_NR_IRQS 112 /* XXX */ -#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) -# define ONCHIP_NR_IRQS 72 -#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) -# define ONCHIP_NR_IRQS 144 -#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ - defined(CONFIG_CPU_SUBTYPE_SH73180) || \ - defined(CONFIG_CPU_SUBTYPE_SH7343) || \ - defined(CONFIG_CPU_SUBTYPE_SH7722) -# define ONCHIP_NR_IRQS 109 -#elif defined(CONFIG_CPU_SUBTYPE_SH7780) -# define ONCHIP_NR_IRQS 111 -#elif defined(CONFIG_CPU_SUBTYPE_SH7206) -# define ONCHIP_NR_IRQS 256 -#elif defined(CONFIG_CPU_SUBTYPE_SH7619) -# define ONCHIP_NR_IRQS 128 -#elif defined(CONFIG_SH_UNKNOWN) /* Most be last */ -# define ONCHIP_NR_IRQS 144 -#endif - -/* 2. PINT_NR_IRQS */ -#ifdef CONFIG_SH_UNKNOWN -# define PINT_NR_IRQS 16 -#else -# ifndef PINT_NR_IRQS -# define PINT_NR_IRQS 0 -# endif -#endif - -#if PINT_NR_IRQS > 0 -# define PINT_IRQ_BASE ONCHIP_NR_IRQS -#endif - -/* 3. OFFCHIP_NR_IRQS */ -#if defined(CONFIG_HD64461) -# define OFFCHIP_NR_IRQS 18 -#elif defined(CONFIG_HD64465) -# define OFFCHIP_NR_IRQS 16 -#elif defined (CONFIG_SH_DREAMCAST) -# define OFFCHIP_NR_IRQS 96 -#elif defined (CONFIG_SH_TITAN) -# define OFFCHIP_NR_IRQS 4 -#elif defined(CONFIG_SH_R7780RP) -# define OFFCHIP_NR_IRQS 16 -#elif defined(CONFIG_SH_7343_SOLUTION_ENGINE) -# define OFFCHIP_NR_IRQS 12 -#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE) -# define OFFCHIP_NR_IRQS 14 -#elif defined(CONFIG_SH_UNKNOWN) -# define OFFCHIP_NR_IRQS 16 /* Must also be last */ -#else -# define OFFCHIP_NR_IRQS 0 -#endif - -#if OFFCHIP_NR_IRQS > 0 -# define OFFCHIP_IRQ_BASE (ONCHIP_NR_IRQS + PINT_NR_IRQS) -#endif - -/* NR_IRQS. 1+2+3 */ -#define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS) +#define NR_IRQS 256 /* * Convert back and forth between INTEVT and IRQ values. diff --git a/include/asm-sh/kdebug.h b/include/asm-sh/kdebug.h new file mode 100644 index 0000000..ef009ba --- /dev/null +++ b/include/asm-sh/kdebug.h @@ -0,0 +1,35 @@ +#ifndef __ASM_SH_KDEBUG_H +#define __ASM_SH_KDEBUG_H + +#include <linux/notifier.h> + +struct pt_regs; + +struct die_args { + struct pt_regs *regs; + int trapnr; +}; + +int register_die_notifier(struct notifier_block *nb); +int unregister_die_notifier(struct notifier_block *nb); +int register_page_fault_notifier(struct notifier_block *nb); +int unregister_page_fault_notifier(struct notifier_block *nb); +extern struct atomic_notifier_head shdie_chain; + +/* Grossly misnamed. */ +enum die_val { + DIE_TRAP, + DIE_PAGE_FAULT, +}; + +static inline int notify_die(enum die_val val, struct pt_regs *regs, + int trap, int sig) +{ + struct die_args args = { + .regs = regs, + .trapnr = trap, + }; + + return atomic_notifier_call_chain(&shdie_chain, val, &args); +} +#endif /* __ASM_SH_KDEBUG_H */ diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h index 9d235af..da36a75 100644 --- a/include/asm-sh/kexec.h +++ b/include/asm-sh/kexec.h @@ -1,5 +1,8 @@ -#ifndef _SH_KEXEC_H -#define _SH_KEXEC_H +#ifndef __ASM_SH_KEXEC_H +#define __ASM_SH_KEXEC_H + +#include <asm/ptrace.h> +#include <asm/string.h> /* * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return. @@ -25,8 +28,37 @@ #define MAX_NOTE_BYTES 1024 -/* Provide a dummy definition to avoid build failures. */ static inline void crash_setup_regs(struct pt_regs *newregs, - struct pt_regs *oldregs) { } + struct pt_regs *oldregs) +{ + if (oldregs) + memcpy(newregs, oldregs, sizeof(*newregs)); + else { + __asm__ __volatile__ ("mov r0, %0" : "=r" (newregs->regs[0])); + __asm__ __volatile__ ("mov r1, %0" : "=r" (newregs->regs[1])); + __asm__ __volatile__ ("mov r2, %0" : "=r" (newregs->regs[2])); + __asm__ __volatile__ ("mov r3, %0" : "=r" (newregs->regs[3])); + __asm__ __volatile__ ("mov r4, %0" : "=r" (newregs->regs[4])); + __asm__ __volatile__ ("mov r5, %0" : "=r" (newregs->regs[5])); + __asm__ __volatile__ ("mov r6, %0" : "=r" (newregs->regs[6])); + __asm__ __volatile__ ("mov r7, %0" : "=r" (newregs->regs[7])); + __asm__ __volatile__ ("mov r8, %0" : "=r" (newregs->regs[8])); + __asm__ __volatile__ ("mov r9, %0" : "=r" (newregs->regs[9])); + __asm__ __volatile__ ("mov r10, %0" : "=r" (newregs->regs[10])); + __asm__ __volatile__ ("mov r11, %0" : "=r" (newregs->regs[11])); + __asm__ __volatile__ ("mov r12, %0" : "=r" (newregs->regs[12])); + __asm__ __volatile__ ("mov r13, %0" : "=r" (newregs->regs[13])); + __asm__ __volatile__ ("mov r14, %0" : "=r" (newregs->regs[14])); + __asm__ __volatile__ ("mov r15, %0" : "=r" (newregs->regs[15])); + + __asm__ __volatile__ ("sts pr, %0" : "=r" (newregs->pr)); + __asm__ __volatile__ ("sts macl, %0" : "=r" (newregs->macl)); + __asm__ __volatile__ ("sts mach, %0" : "=r" (newregs->mach)); + + __asm__ __volatile__ ("stc gbr, %0" : "=r" (newregs->gbr)); + __asm__ __volatile__ ("stc sr, %0" : "=r" (newregs->sr)); -#endif /* _SH_KEXEC_H */ + newregs->pc = (unsigned long)current_text_addr(); + } +} +#endif /* __ASM_SH_KEXEC_H */ diff --git a/include/asm-sh/kgdb.h b/include/asm-sh/kgdb.h index 0095c66..74bd095 100644 --- a/include/asm-sh/kgdb.h +++ b/include/asm-sh/kgdb.h @@ -17,6 +17,7 @@ #define __KGDB_H #include <asm/ptrace.h> +#include <asm/cacheflush.h> struct console; @@ -45,35 +46,21 @@ extern int kgdb_portnum; extern int kgdb_baud; extern char kgdb_parity; extern char kgdb_bits; -extern int kgdb_console_setup(struct console *, char *); /* Init and interface stuff */ extern int kgdb_init(void); -extern int (*kgdb_serial_setup)(void); extern int (*kgdb_getchar)(void); extern void (*kgdb_putchar)(int); -struct kgdb_sermap { - char *name; - int namelen; - int (*setup_fn)(struct console *, char *); - struct kgdb_sermap *next; -}; -extern void kgdb_register_sermap(struct kgdb_sermap *map); -extern struct kgdb_sermap *kgdb_porttype; - /* Trap functions */ -typedef void (kgdb_debug_hook_t)(struct pt_regs *regs); +typedef void (kgdb_debug_hook_t)(struct pt_regs *regs); typedef void (kgdb_bus_error_hook_t)(void); extern kgdb_debug_hook_t *kgdb_debug_hook; extern kgdb_bus_error_hook_t *kgdb_bus_err_hook; -extern void breakpoint(void); - /* Console */ -struct console; void kgdb_console_write(struct console *co, const char *s, unsigned count); -void kgdb_console_init(void); +extern int kgdb_console_setup(struct console *, char *); /* Prototypes for jmp fns */ #define _JBLEN 9 @@ -81,11 +68,8 @@ typedef int jmp_buf[_JBLEN]; extern void longjmp(jmp_buf __jmpb, int __retval); extern int setjmp(jmp_buf __jmpb); -/* Variadic macro to print our own message to the console */ -#define KGDB_PRINTK(...) printk("KGDB: " __VA_ARGS__) - /* Forced breakpoint */ -#define BREAKPOINT() \ +#define breakpoint() \ do { \ if (kgdb_enabled) \ __asm__ __volatile__("trapa #0x3c"); \ @@ -95,7 +79,6 @@ do { \ #if defined(CONFIG_CPU_SH4) #define kgdb_flush_icache_range(start, end) \ { \ - extern void __flush_purge_region(void *, int); \ __flush_purge_region((void*)(start), (int)(end) - (int)(start));\ flush_icache_range((start), (end)); \ } @@ -103,31 +86,6 @@ do { \ #define kgdb_flush_icache_range(start, end) do { } while (0) #endif -/* Kernel assert macros */ -#ifdef CONFIG_KGDB_KERNEL_ASSERTS - -/* Predefined conditions */ -#define KA_VALID_ERRNO(errno) ((errno) > 0 && (errno) <= EMEDIUMTYPE) -#define KA_VALID_PTR_ERR(ptr) KA_VALID_ERRNO(-PTR_ERR(ptr)) -#define KA_VALID_KPTR(ptr) (!(ptr) || \ - ((void *)(ptr) >= (void *)PAGE_OFFSET && \ - (void *)(ptr) < ERR_PTR(-EMEDIUMTYPE))) -#define KA_VALID_PTRORERR(errptr) \ - (KA_VALID_KPTR(errptr) || KA_VALID_PTR_ERR(errptr)) -#define KA_HELD_GKL() (current->lock_depth >= 0) - -/* The actual assert */ -#define KGDB_ASSERT(condition, message) do { \ - if (!(condition) && (kgdb_enabled)) { \ - KGDB_PRINTK("Assertion failed at %s:%d: %s\n", \ - __FILE__, __LINE__, message);\ - BREAKPOINT(); \ - } \ -} while (0) -#else -#define KGDB_ASSERT(condition, message) -#endif - /* Taken from sh-stub.c of GDB 4.18 */ static const char hexchars[] = "0123456789abcdef"; @@ -142,5 +100,4 @@ static inline char lowhex(const int x) { return hexchars[x & 0xf]; } - #endif diff --git a/include/asm-sh/lboxre2.h b/include/asm-sh/lboxre2.h new file mode 100644 index 0000000..e6d1605 --- /dev/null +++ b/include/asm-sh/lboxre2.h @@ -0,0 +1,27 @@ +#ifndef __ASM_SH_LBOXRE2_H +#define __ASM_SH_LBOXRE2_H + +/* + * Copyright (C) 2007 Nobuhiro Iwamatsu + * + * NTT COMWARE L-BOX RE2 support + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ + +#define IRQ_CF1 9 /* CF1 */ +#define IRQ_CF0 10 /* CF0 */ +#define IRQ_INTD 11 /* INTD */ +#define IRQ_ETH1 12 /* Ether1 */ +#define IRQ_ETH0 13 /* Ether0 */ +#define IRQ_INTA 14 /* INTA */ + +void init_lboxre2_IRQ(void); + +#define __IO_PREFIX lboxre2 +#include <asm/io_generic.h> + +#endif /* __ASM_SH_LBOXRE2_H */ diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h index 01acaaa..199662b 100644 --- a/include/asm-sh/mmu_context.h +++ b/include/asm-sh/mmu_context.h @@ -169,6 +169,8 @@ enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) #define destroy_context(mm) do { } while (0) #define set_asid(asid) do { } while (0) #define get_asid() (0) +#define set_TTB(pgd) do { } while (0) +#define get_TTB() (0) #define activate_context(mm,cpu) do { } while (0) #define switch_mm(prev,next,tsk) do { } while (0) #define deactivate_mm(tsk,mm) do { } while (0) @@ -211,8 +213,8 @@ static inline void disable_mmu(void) * MMU control handlers for processors lacking memory * management hardware. */ -#define enable_mmu() do { BUG(); } while (0) -#define disable_mmu() do { BUG(); } while (0) +#define enable_mmu() do { } while (0) +#define disable_mmu() do { } while (0) #endif #endif /* __KERNEL__ */ diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index ac4b467..7464de4 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -59,6 +59,7 @@ extern void (*clear_page)(void *to); extern void (*copy_page)(void *to, void *from); extern unsigned long shm_align_mask; +extern unsigned long max_low_pfn, min_low_pfn; #ifdef CONFIG_MMU extern void clear_page_slow(void *to); @@ -124,17 +125,16 @@ typedef struct { unsigned long pgd; } pgd_t; #define PAGE_OFFSET CONFIG_PAGE_OFFSET #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) #define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) +#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) -#define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT) - -#define phys_to_page(phys) (mem_map + (((phys)-__MEMORY_START) >> PAGE_SHIFT)) -#define page_to_phys(page) (((page - mem_map) << PAGE_SHIFT) + __MEMORY_START) +#define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT)) +#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) /* PFN start number, because of __MEMORY_START */ #define PFN_START (__MEMORY_START >> PAGE_SHIFT) #define ARCH_PFN_OFFSET (PFN_START) #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#define pfn_valid(pfn) (((pfn) - PFN_START) < max_mapnr) +#define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn) #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ diff --git a/include/asm-sh/param.h b/include/asm-sh/param.h index ce13064..1012296 100644 --- a/include/asm-sh/param.h +++ b/include/asm-sh/param.h @@ -5,7 +5,7 @@ # ifdef CONFIG_SH_WDT # define HZ 1000 /* Needed for high-res WOVF */ # else -# define HZ 100 +# define HZ CONFIG_HZ # endif # define USER_HZ 100 /* User interfaces are in "ticks" */ # define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h index 6ccc948..b1f9a9e 100644 --- a/include/asm-sh/pci.h +++ b/include/asm-sh/pci.h @@ -35,7 +35,7 @@ extern struct pci_channel board_pci_channels[]; /* * I/O routine helpers */ -#ifdef CONFIG_CPU_SUBTYPE_SH7780 +#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) #define PCI_IO_AREA 0xFE400000 #define PCI_IO_SIZE 0x00400000 #else diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 3e46a7a..d42f68e 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -44,7 +44,7 @@ enum cpu_type { /* SH-3 types */ CPU_SH7705, CPU_SH7706, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, - CPU_SH7709, CPU_SH7709A, CPU_SH7710, + CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, CPU_SH7729, CPU_SH7300, /* SH-4 types */ diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h index c18f648..4083b59 100644 --- a/include/asm-sh/r7780rp.h +++ b/include/asm-sh/r7780rp.h @@ -1,17 +1,11 @@ #ifndef __ASM_SH_RENESAS_R7780RP_H #define __ASM_SH_RENESAS_R7780RP_H -/* - * linux/include/asm-sh/r7780rp.h - * - * Copyright (C) 2000 Atom Create Engineering Co., Ltd. - * - * Renesas Solutions Highlander R7780RP support - */ - /* Box specific addresses. */ #if defined(CONFIG_SH_R7780MP) #define PA_BCR 0xa4000000 /* FPGA */ +#define PA_SDPOW (-1) + #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ #define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ #define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */ @@ -70,18 +64,12 @@ #define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ #define PA_PMR (PA_BCR+0x0900) /* */ -#define PA_AX88796L 0xa4100400 /* AX88796L Area */ -#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */ -#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ -#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ - #define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ #define IRQ_PCISLOT1 65 /* PCI Slot #1 IRQ */ #define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */ #define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */ #define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */ -// #define IRQ_CFINST 0 /* CF Card Insert IRQ */ #define IRQ_TP 2 /* Touch Panel IRQ */ #define IRQ_SCI1 3 /* SCI1 IRQ */ #define IRQ_SCI0 4 /* SCI0 IRQ */ @@ -95,7 +83,10 @@ #define IRQ_ONETH 13 /* On board Ethernet IRQ */ #define IRQ_PSW 14 /* Push Switch IRQ */ -#else /* R7780RP */ +#define IVDR_CK_ON 8 /* iVDR Clock ON */ + +#elif defined(CONFIG_SH_R7780RP) +#define PA_POFF (-1) #define PA_BCR 0xa5000000 /* FPGA */ #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ @@ -163,7 +154,60 @@ #define IRQ_PSW 13 /* Push Switch IRQ */ #define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */ -#endif /* CONFIG_SH_R7780MP */ +#define IVDR_CK_ON 8 /* iVDR Clock ON */ + +#elif defined(CONFIG_SH_R7785RP) +#define PA_BCR 0xa4000000 /* FPGA */ +#define PA_SDPOW (-1) + +#define PA_PCISCR (PA_BCR+0x0000) +#define PA_IRLPRA (PA_BCR+0x0002) +#define PA_IRLPRB (PA_BCR+0x0004) +#define PA_IRLPRC (PA_BCR+0x0006) +#define PA_IRLPRD (PA_BCR+0x0008) +#define IRLCNTR1 (PA_BCR+0x0010) +#define PA_IRLPRE (PA_BCR+0x000a) +#define PA_IRLPRF (PA_BCR+0x000c) +#define PA_EXIRLCR (PA_BCR+0x000e) +#define PA_IRLMCR1 (PA_BCR+0x0010) +#define PA_IRLMCR2 (PA_BCR+0x0012) +#define PA_IRLSSR1 (PA_BCR+0x0014) +#define PA_IRLSSR2 (PA_BCR+0x0016) +#define PA_CFTCR (PA_BCR+0x0100) +#define PA_CFPCR (PA_BCR+0x0102) +#define PA_PCICR (PA_BCR+0x0110) +#define PA_IVDRCTL (PA_BCR+0x0112) +#define PA_IVDRSR (PA_BCR+0x0114) +#define PA_PDRSTCR (PA_BCR+0x0116) +#define PA_POFF (PA_BCR+0x0120) +#define PA_LCDCR (PA_BCR+0x0130) +#define PA_TPCR (PA_BCR+0x0140) +#define PA_TPCKCR (PA_BCR+0x0142) +#define PA_TPRSTR (PA_BCR+0x0144) +#define PA_TPXPDR (PA_BCR+0x0146) +#define PA_TPYPDR (PA_BCR+0x0148) +#define PA_GPIOPFR (PA_BCR+0x0150) +#define PA_GPIODR (PA_BCR+0x0152) +#define PA_OBLED (PA_BCR+0x0154) +#define PA_SWSR (PA_BCR+0x0156) +#define PA_VERREG (PA_BCR+0x0158) +#define PA_SMCR (PA_BCR+0x0200) +#define PA_SMSMADR (PA_BCR+0x0202) +#define PA_SMMR (PA_BCR+0x0204) +#define PA_SMSADR1 (PA_BCR+0x0206) +#define PA_SMSADR32 (PA_BCR+0x0244) +#define PA_SMTRDR1 (PA_BCR+0x0246) +#define PA_SMTRDR16 (PA_BCR+0x0264) +#define PA_CU3MDR (PA_BCR+0x0300) +#define PA_CU5MDR (PA_BCR+0x0302) +#define PA_MMSR (PA_BCR+0x0400) + +#define IVDR_CK_ON 4 /* iVDR Clock ON */ + +#endif + +void make_r7780rp_irq(unsigned int irq); +void highlander_init_irq(void); #define __IO_PREFIX r7780rp #include <asm/io_generic.h> diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h index a183215..bd2596c 100644 --- a/include/asm-sh/se.h +++ b/include/asm-sh/se.h @@ -69,9 +69,11 @@ #define BCR_ILCRG (PA_BCR + 12) #if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define IRQ_STNIC 12 +#define IRQ_STNIC 12 +#define IRQ_CFCARD 14 #else #define IRQ_STNIC 10 +#define IRQ_CFCARD 7 #endif #define __IO_PREFIX se diff --git a/include/asm-sh/se7722.h b/include/asm-sh/se7722.h new file mode 100644 index 0000000..b3b31e4 --- /dev/null +++ b/include/asm-sh/se7722.h @@ -0,0 +1,118 @@ +#ifndef __ASM_SH_SE7722_H +#define __ASM_SH_SE7722_H + +/* + * linux/include/asm-sh/se7722.h + * + * Copyright (C) 2007 Nobuhiro Iwamatsu + * + * Hitachi UL SolutionEngine 7722 Support. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ +#include <asm/addrspace.h> + +/* Box specific addresses. */ +#define SE_AREA0_WIDTH 4 /* Area0: 32bit */ +#define PA_ROM 0xa0000000 /* EPROM */ +#define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */ +#define PA_FROM 0xa1000000 /* Flash-ROM */ +#define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */ +#define PA_EXT1 0xa4000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_SDRAM 0xaC000000 /* DDR-SDRAM(Area3) 64MB */ +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0xb0000000 +#define PA_EXT4_SIZE 0x04000000 + +#define PA_PERIPHERAL 0xB0000000 + +#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */ +#define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000) /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */ +#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */ + +#define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ +/* GPIO */ +#define MSTPCR0 0xA4150030UL +#define MSTPCR1 0xA4150034UL +#define MSTPCR2 0xA4150038UL + +#define FPGA_IN 0xb1840000UL +#define FPGA_OUT 0xb1840004UL + +#define PORT_PECR 0xA4050108UL +#define PORT_PJCR 0xA4050110UL +#define PORT_PSELD 0xA4050154UL +#define PORT_PSELB 0xA4050150UL + +#define PORT_PSELC 0xA4050152UL +#define PORT_PKCR 0xA4050112UL +#define PORT_PHCR 0xA405010EUL +#define PORT_PLCR 0xA4050114UL +#define PORT_PMCR 0xA4050116UL +#define PORT_PRCR 0xA405011CUL +#define PORT_PXCR 0xA4050148UL +#define PORT_PSELA 0xA405014EUL +#define PORT_PYCR 0xA405014AUL +#define PORT_PZCR 0xA405014CUL + +/* IRQ */ +#define IRQ0_IRQ 32 +#define IRQ1_IRQ 33 +#define INTC_ICR0 0xA4140000UL +#define INTC_ICR1 0xA414001CUL + +#define INTMSK0 0xa4140044 +#define INTMSKCLR0 0xa4140064 +#define INTC_INTPRI0 0xa4140010 + +#define IRQ01_MODE 0xb1800000 +#define IRQ01_STS 0xb1800004 +#define IRQ01_MASK 0xb1800008 +#define EXT_BIT (0x3fc0) /* SH IRQ1 */ +#define MRSHPC_BIT0 (0x0004) /* SH IRQ1 */ +#define MRSHPC_BIT1 (0x0008) /* SH IRQ1 */ +#define MRSHPC_BIT2 (0x0010) /* SH IRQ1 */ +#define MRSHPC_BIT3 (0x0020) /* SH IRQ1 */ +#define SMC_BIT (0x0002) /* SH IRQ0 */ +#define USB_BIT (0x0001) /* SH IRQ0 */ + +#define MRSHPC_IRQ3 11 +#define MRSHPC_IRQ2 12 +#define MRSHPC_IRQ1 13 +#define MRSHPC_IRQ0 14 +#define SMC_IRQ 10 +#define EXT_IRQ 5 +#define USB_IRQ 6 + + +/* arch/sh/boards/se/7722/irq.c */ +void init_se7722_IRQ(void); +int se7722_irq_demux(int); + +#define __IO_PREFIX se7722 +#include <asm/io_generic.h> + +#endif /* __ASM_SH_SE7722_H */ diff --git a/include/asm-sh/se7751.h b/include/asm-sh/se7751.h index 88cd379..02ca934 100644 --- a/include/asm-sh/se7751.h +++ b/include/asm-sh/se7751.h @@ -65,6 +65,8 @@ #define IRQ_79C973 13 +void init_7751se_IRQ(void); + #define __IO_PREFIX sh7751se #include <asm/io_generic.h> diff --git a/include/asm-sh/se7780.h b/include/asm-sh/se7780.h new file mode 100644 index 0000000..40e9b41 --- /dev/null +++ b/include/asm-sh/se7780.h @@ -0,0 +1,108 @@ +#ifndef __ASM_SH_SE7780_H +#define __ASM_SH_SE7780_H + +/* + * linux/include/asm-sh/se7780.h + * + * Copyright (C) 2006,2007 Nobuhiro Iwamatsu + * + * Hitachi UL SolutionEngine 7780 Support. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <asm/addrspace.h> + +/* Box specific addresses. */ +#define SE_AREA0_WIDTH 4 /* Area0: 32bit */ +#define PA_ROM 0xa0000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0xa1000000 /* Flash-ROM */ +#define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */ +#define PA_EXT1 0xa4000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_SM501 PA_EXT1 /* Graphic IC (SM501) */ +#define PA_SM501_SIZE PA_EXT1_SIZE /* Graphic IC (SM501) */ +#define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */ +#define PA_SDRAM_SIZE 0x08000000 + +#define PA_EXT4 0xb0000000 +#define PA_EXT4_SIZE 0x04000000 +#define PA_EXT_FLASH PA_EXT4 /* Expansion Flash-ROM */ + +#define PA_PERIPHERAL PA_AREA6_IO /* SW6-6=ON */ + +#define PA_LAN (PA_PERIPHERAL + 0) /* SMC LAN91C111 */ +#define PA_LED_DISP (PA_PERIPHERAL + 0x02000000) /* 8words LED Display */ +#define DISP_CHAR_RAM (7 << 3) +#define DISP_SEL0_ADDR (DISP_CHAR_RAM + 0) +#define DISP_SEL1_ADDR (DISP_CHAR_RAM + 1) +#define DISP_SEL2_ADDR (DISP_CHAR_RAM + 2) +#define DISP_SEL3_ADDR (DISP_CHAR_RAM + 3) +#define DISP_SEL4_ADDR (DISP_CHAR_RAM + 4) +#define DISP_SEL5_ADDR (DISP_CHAR_RAM + 5) +#define DISP_SEL6_ADDR (DISP_CHAR_RAM + 6) +#define DISP_SEL7_ADDR (DISP_CHAR_RAM + 7) + +#define DISP_UDC_RAM (5 << 3) +#define PA_FPGA (PA_PERIPHERAL + 0x03000000) /* FPGA base address */ + +/* FPGA register address and bit */ +#define FPGA_SFTRST (PA_FPGA + 0) /* Soft reset register */ +#define FPGA_INTMSK1 (PA_FPGA + 2) /* Interrupt Mask register 1 */ +#define FPGA_INTMSK2 (PA_FPGA + 4) /* Interrupt Mask register 2 */ +#define FPGA_INTSEL1 (PA_FPGA + 6) /* Interrupt select register 1 */ +#define FPGA_INTSEL2 (PA_FPGA + 8) /* Interrupt select register 2 */ +#define FPGA_INTSEL3 (PA_FPGA + 10) /* Interrupt select register 3 */ +#define FPGA_PCI_INTSEL1 (PA_FPGA + 12) /* PCI Interrupt select register 1 */ +#define FPGA_PCI_INTSEL2 (PA_FPGA + 14) /* PCI Interrupt select register 2 */ +#define FPGA_INTSET (PA_FPGA + 16) /* IRQ/IRL select register */ +#define FPGA_INTSTS1 (PA_FPGA + 18) /* Interrupt status register 1 */ +#define FPGA_INTSTS2 (PA_FPGA + 20) /* Interrupt status register 2 */ +#define FPGA_REQSEL (PA_FPGA + 22) /* REQ/GNT select register */ +#define FPGA_DBG_LED (PA_FPGA + 32) /* Debug LED(D-LED[8:1] */ +#define PA_LED FPGA_DBG_LED +#define FPGA_IVDRID (PA_FPGA + 36) /* iVDR ID Register */ +#define FPGA_IVDRPW (PA_FPGA + 38) /* iVDR Power ON Register */ +#define FPGA_MMCID (PA_FPGA + 40) /* MMC ID Register */ + +/* FPGA INTSEL position */ +/* INTSEL1 */ +#define IRQPOS_SMC91CX (0 * 4) +#define IRQPOS_SM501 (1 * 4) +/* INTSEL2 */ +#define IRQPOS_EXTINT1 (0 * 4) +#define IRQPOS_EXTINT2 (1 * 4) +#define IRQPOS_EXTINT3 (2 * 4) +#define IRQPOS_EXTINT4 (3 * 4) +/* INTSEL3 */ +#define IRQPOS_PCCPW (0 * 4) + +/* IDE interrupt */ +#define IRQ_IDE0 67 /* iVDR */ + +/* SMC interrupt */ +#define SMC_IRQ 8 + +/* SM501 interrupt */ +#define SM501_IRQ 0 + +/* interrupt pin */ +#define IRQPIN_EXTINT1 0 /* IRQ0 pin */ +#define IRQPIN_EXTINT2 1 /* IRQ1 pin */ +#define IRQPIN_EXTINT3 2 /* IRQ2 pin */ +#define IRQPIN_SMC91CX 3 /* IRQ3 pin */ +#define IRQPIN_EXTINT4 4 /* IRQ4 pin */ +#define IRQPIN_PCC0 5 /* IRQ5 pin */ +#define IRQPIN_PCC2 6 /* IRQ6 pin */ +#define IRQPIN_SM501 7 /* IRQ7 pin */ +#define IRQPIN_PCCPW 7 /* IRQ7 pin */ + +/* arch/sh/boards/se/7780/irq.c */ +void init_se7780_IRQ(void); + +#define __IO_PREFIX se7780 +#include <asm/io_generic.h> + +#endif /* __ASM_SH_SE7780_H */ diff --git a/include/asm-sh/stat.h b/include/asm-sh/stat.h index 6c41a60..6d6ad26 100644 --- a/include/asm-sh/stat.h +++ b/include/asm-sh/stat.h @@ -16,15 +16,13 @@ struct __old_kernel_stat { }; struct stat { - unsigned short st_dev; - unsigned short __pad1; - unsigned long st_ino; + unsigned long st_dev; + unsigned long st_ino; unsigned short st_mode; unsigned short st_nlink; unsigned short st_uid; unsigned short st_gid; - unsigned short st_rdev; - unsigned short __pad2; + unsigned long st_rdev; unsigned long st_size; unsigned long st_blksize; unsigned long st_blocks; @@ -38,8 +36,6 @@ struct stat { unsigned long __unused5; }; -#define STAT_HAVE_NSEC 1 - /* This matches struct stat64 in glibc2.1, hence the absolutely * insane amounts of padding around dev_t's. */ @@ -47,7 +43,9 @@ struct stat64 { unsigned long long st_dev; unsigned char __pad0[4]; - unsigned long st_ino; +#define STAT64_HAS_BROKEN_ST_INO 1 + unsigned long __st_ino; + unsigned int st_mode; unsigned int st_nlink; @@ -71,8 +69,9 @@ struct stat64 { unsigned long st_ctime; unsigned long st_ctime_nsec; - unsigned long __unused1; - unsigned long __unused2; + unsigned long long st_ino; }; +#define STAT_HAVE_NSEC 1 + #endif /* __ASM_SH_STAT_H */ diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index 4a6a19f..127af30 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -9,6 +9,7 @@ #include <linux/irqflags.h> #include <linux/compiler.h> #include <asm/types.h> +#include <asm/ptrace.h> /* * switch_to() should switch tasks to task nr n, first @@ -255,6 +256,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old, (unsigned long)_n_, sizeof(*(ptr))); \ }) +extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); + extern void *set_exception_table_vec(unsigned int vec, void *handler); static inline void *set_exception_table_evt(unsigned int evt, void *handler) |