| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| | |
|
| |
|
|
|
|
|
|
|
| |
This patch adds an SSP platform device definition for the tnetv107x soc family.
The clock lookup entry has also been updated to match.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch applies the following modifications to the tnetv107x clock tree:
- reparent tnetv107x usb clocks to usbss
- mark timer1 as always enabled
- enable set_rate on pll divider output clocks
- adjust tnetv107x tsc sysclk rate lower to fix invalid reset defaults
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| |
|
|
|
|
|
|
| |
This patch adds a platform device definition for tnetv107x's touchscreen
controller.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| |
|
|
|
|
|
|
| |
This patch adds a platform device definition for tnetv107x's keypad
controller.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch modifies the EDMA driver to expect the channel
controller (CC) infomation passed on by the platform as a fixed
size (EDMA_MAX_CC) array of pointers to structures.
Doing so helps catch errors of the sort where the resource
structure has information for more channel controllers than
the number channel controller info structures defined.
Such insufficient platform data would lead to illegal memory
accesses.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
|
|
TNETV107X is a Texas Instruments SOC that shares a number of common features
with the Davinci architecture. Some of the key differences between
traditional Davincis and this new SOC are as follow:
1. The SOCs clock architecture includes a new spread-spectrum PLL. Some
elements of the clock architecture are reused from Davinci (e.g. LPSC), but
the PLL related code is overridden using existing interfaces in "struct clk".
2. The MMR layout on this SOC is substantially different from Davinci.
Consequently, the fixed I/O map is a whole lot more convoluted (more so than
DA8xx). The net impact here is that IO_ADDRESS() will not work on this SoC,
and therefore all mappings have to be through ioremap().
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
