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* Dove: Fix irq_to_pmu()Russell King - ARM Linux2012-12-101-1/+1
| | | | | | | | | | | | | | | commit d356cf5a74afa32b40decca3c9dd88bc3cd63eb5 upstream. PMU interrupts start at IRQ_DOVE_PMU_START, not IRQ_DOVE_PMU_START + 1. Fix the condition. (It may have been less likely to occur had the code been written "if (irq >= IRQ_DOVE_PMU_START" which imho is the easier to understand notation, and matches the normal way of thinking about these things.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Dove: Attempt to fix PMU/RTC interruptsRussell King - ARM Linux2012-12-101-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 5d3df935426271016b895aecaa247101b4bfa35e upstream. Fix the acknowledgement of PMU interrupts on Dove: some Dove hardware has not been sensibly designed so that interrupts can be handled in a race free manner. The PMU is one such instance. The pending (aka 'cause') register is a bunch of RW bits, meaning that these bits can be both cleared and set by software (confirmed on the Armada-510 on the cubox.) Hardware sets the appropriate bit when an interrupt is asserted, and software is required to clear the bits which are to be processed. If we write ~(1 << bit), then we end up asserting every other interrupt except the one we're processing. So, we need to do a read-modify-write cycle to clear the asserted bit. However, any interrupts which occur in the middle of this cycle will also be written back as zero, which will also clear the new interrupts. The upshot of this is: there is _no_ way to safely clear down interrupts in this register (and other similarly behaving interrupt pending registers on this device.) The patch below at least stops us creating new interrupts. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ARM: orion: Fix USB phy for orion5x.Andrew Lunn2012-03-121-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | commit 72053353583230952c4b187e110e9da00dfc3afb upstream. The patch "ARM: orion: Consolidate USB platform setup code.", commit 4fcd3f374a928081d391cd9a570afe3b2c692fdc broke USB on TS-7800 and other orion5x boards, because the wrong type of PHY was being passed to the EHCI driver in the platform data. Orion5x needs EHCI_PHY_ORION and all the others want EHCI_PHY_NA. Allow the mach- code to tell the generic plat-orion code which USB PHY enum to place into the platform data. Version 2: Rebase to v3.3-rc2. Reported-by: Ambroz Bizjak <ambrop7@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Ambroz Bizjak <ambrop7@gmail.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ARM: Dove: fix second SPI initialization callNicolas Pitre2011-10-031-1/+1
| | | | | | | | | | | | commit 72cc205611879525db0374d9831f84f787112b25 upstream. Commit 980f9f601a "ARM: orion: Consolidate SPI initialization." broke it by overwriting the SPI0 registration. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* ARM: dove: Consolidate mpp code with platform mpp.Andrew Lunn2011-05-162-284/+212
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate SATA platform setup.Andrew Lunn2011-05-161-27/+3
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate USB platform setup code.Andrew Lunn2011-05-161-61/+4
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate the XOR platform setup code.Andrew Lunn2011-05-161-192/+5
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate SPI initialization.Andrew Lunn2011-05-161-62/+3
| | | | | | | | This change removes the interrupt resource. The driver does not use it. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate I2C initialization.Andrew Lunn2011-05-161-32/+1
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate ethernet platform dataAndrew Lunn2011-05-161-50/+3
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate the creation of the RTC platform data.Andrew Lunn2011-05-161-12/+1
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Consolidate the creation of the uart platform data.Andrew Lunn2011-05-161-148/+11
| | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: orion: Rename some constants to macros to make code more identicalAndrew Lunn2011-05-161-3/+4
| | | | | | | | Changing eg 0xffffffff to DMA_BIT_MASK(32) etc allows easier side by side comparision of identical code which can be consolidated. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* arm: Fold irq_set_chip/irq_set_handlerThomas Gleixner2011-03-291-2/+1
| | | | | | Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arm: Cleanup the irq namespaceThomas Gleixner2011-03-291-8/+8
| | | | | | Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arm: dove: Use proper irq accessor functionsThomas Gleixner2011-03-291-3/+2
| | | | | | Remove the obsolete desc_handle_irq() helper. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arm: dove: Use correct GPIO_BASE and remove orion_gpio_init() leftoverThomas Gleixner2011-03-292-4/+1
| | | | | | | | | | commit 9eac6d0 (ARM: Remove dependency of plat-orion GPIO code on mach directory includes) missed to convert one instance of DOVE_GPIO_VIRT_BASE and left the orion_gpio_init() in mpp.c Fix it up. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-03-179-70/+27
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (289 commits) davinci: DM644x EVM: register MUSB device earlier davinci: add spi devices on tnetv107x evm davinci: add ssp config for tnetv107x evm board davinci: add tnetv107x ssp platform device spi: add ti-ssp spi master driver mfd: add driver for sequencer serial port ARM: EXYNOS4: Implement Clock gating for System MMU ARM: EXYNOS4: Enhancement of System MMU driver ARM: EXYNOS4: Add support for gpio interrupts ARM: S5P: Add function to register gpio interrupt bank data ARM: S5P: Cleanup S5P gpio interrupt code ARM: EXYNOS4: Add missing GPYx banks ARM: S3C64XX: Fix section mismatch from cpufreq init ARM: EXYNOS4: Add keypad device to the SMDKV310 ARM: EXYNOS4: Update clocks for keypad ARM: EXYNOS4: Update keypad base address ARM: EXYNOS4: Add keypad device helpers ARM: EXYNOS4: Add support for SATA on ARMLEX4210 plat-nomadik: make GPIO interrupts work with cpuidle ApSleep mach-u300: define a dummy filter function for coh901318 ... Fix up various conflicts in - arch/arm/mach-exynos4/cpufreq.c - arch/arm/mach-mxs/gpio.c - drivers/net/Kconfig - drivers/tty/serial/Kconfig - drivers/tty/serial/Makefile - drivers/usb/gadget/fsl_mxc_udc.c - drivers/video/Kconfig
| * ARM: Dove: Remove PXA compatibility IRQ defines.Lennert Buytenhek2011-03-031-6/+1
| | | | | | | | | | | | | | | | | | | | | | These are not currently used anywhere, but when the relevant peripherals are enabled on the Dove port, the IRQ numbers should be passed into the drivers via platform device resources rather than having the drivers get them from platform headers directly. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Acked-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
| * ARM: Remove dependency of plat-orion GPIO code on mach directory includes.Lennert Buytenhek2011-03-033-59/+16
| | | | | | | | | | | | | | | | | | | | | | | | This patch makes the various mach dirs that use the plat-orion GPIO code pass in GPIO-related platform info (GPIO controller base address, secondary base IRQ number, etc) explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
| * ARM: Remove dependency of plat-orion time code on mach directory includes.Lennert Buytenhek2011-03-035-5/+10
| | | | | | | | | | | | | | | | | | | | | | This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* | Merge branch 'p2v' into develRussell King2011-03-161-1/+1
|\ \ | | | | | | | | | | | | | | | Conflicts: arch/arm/kernel/module.c arch/arm/mach-s5pv210/sleep.S
| * | ARM: P2V: separate PHYS_OFFSET from platform definitionsRussell King2011-02-171-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uncouple PHYS_OFFSET from the platform definitions, thereby facilitating run-time computation of the physical memory offset. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: v6k: Dove platforms use V6K architecture CPUsRussell King2011-02-021-1/+1
|/ | | | | | | Make Dove platforms select the new V6K CPU option. Tested-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: dove: irq_data conversion.Lennert Buytenhek2011-01-131-9/+9
| | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Acked-by: Nicolas Pitre <nico@fluxnic.net>
* ARM: dove: Switch SDHCI devices over to "sdhci-dove" driverMike Rapoport2011-01-081-2/+2
| | | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> CC: Saeed Bishara <saeed@marvell.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* [ARM] Dove: add support for multi-purpose pins configurationMike Rapoport2010-12-154-2/+440
| | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> Acked-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* [ARM] Dove: add support for GPIOs 64-71Mike Rapoport2010-12-152-2/+5
| | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> Acked-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* [ARM] Dove: add support for CM-A510 machine.Konstantin Sinyuk2010-11-293-0/+102
| | | | | | | | | This patch adds support for CM-A510 machine Signed-off-by: Konstantin Sinyuk <kostyas@compulab.co.il> Signed-off-by: Mike Rapoport <mike@compulab.co.il> Reviewed-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* arm: remove machine_desc.io_pg_offst and .phys_ioNicolas Pitre2010-10-201-2/+0
| | | | | | | | | | | | | | | Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
* arm: return both physical and virtual addresses from addruartJeremy Kerr2010-10-201-6/+5
| | | | | | | | | | | | | | | | | | | | Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
* ARM: dove: fix __io() definition to use bus based offsetEric Miao2010-09-191-3/+3
| | | | | | Signed-off-by: Eric Miao <eric.miao@canonical.com> Acked-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* [ARM] Dove: platform device registration for the sdio interfacesSaeed Bishara2010-07-163-0/+65
| | | | | Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* Merge branch 'origin' into devel-stableRussell King2010-03-082-2/+2
|\ | | | | | | | | | | | | Conflicts: arch/arm/mach-mx2/devices.c arch/arm/mach-mx2/devices.h sound/soc/pxa/pxa-ssp.c
| * Merge branch 'misc2' into develRussell King2010-02-251-1/+1
| |\
| | * ARM: 5928/1: Change type of VMALLOC_END to unsigned long.Fenkart/Bostandzhyan2010-02-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Makes it consistent with VMALLOC_START Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Andreas Fenkart <andreas.fenkart@streamunlimited.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 5910/1: ARM: Add tmp register for addruart and loadspTony Lindgren2010-02-121-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise more complicated uart configuration won't be possible. We can use r1 for tmp register for both head.S and debug.S. NOTE: This patch depends on another patch to add the the tmp register into all debug-macro.S files. That can be done with: $ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/" arch/arm/*/include/*/debug-macro.S Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | mach-dove/common.c: remove unnecessary (void *) castsH Hartley Sweeten2010-02-051-4/+4
|/ | | | | | | | The (void *) cast is not needed when setting dev.platform_data to the address of the data. Remove the casts. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* ARM: Add Tauros2 L2 cache controller supportLennert Buytenhek2009-11-271-0/+4
| | | | | | | | | Support for the Tauros2 L2 cache controller as used with the PJ1 and PJ4 CPUs. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* ARM: add base support for Marvell Dove SoCSaeed Bishara2009-11-2723-0/+2103
The Marvell Dove (88AP510) is a high-performance, highly integrated, low power SoC with high-end ARM-compatible processor (known as PJ4), graphics processing unit, high-definition video decoding acceleration hardware, and a broad range of peripherals. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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