kernel_samsung_smdk4412.git - kernel for Galaxy S3

	Commit message (Collapse)	Author	Age	Files	Lines
*	arm: Cleanup the irq namespace	Thomas Gleixner	2011-03-29	1	-1/+1
\| \| \| \| \| \|	Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
*	msm: clock: Remove unused code and definitions	Stephen Boyd	2011-01-28	1	-4/+0
\| \| \| \| \| \| \| \|	This code is dead or otherwise useless so just remove it. Reviewed-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
*	ARM: GIC: consolidate gic_cpu_base_addr to common GIC code	Russell King	2010-12-14	1	-4/+2
\| \| \| \| \| \| \| \| \| \|	Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	ARM: GIC: provide a single initialization function for boot CPU	Russell King	2010-12-14	1	-2/+1
\| \| \| \| \| \| \| \| \|	Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	msm: add MSM8x60 FFA support	Gregory Bean	2010-10-08	1	-0/+7
\| \| \| \| \| \| \| \|	The MSM8X60 FFA contains different components than the MSM8X60 SURF, and therefore requires a different ARCH type and machine ID. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
*	msm: MSM8X60 simulator board support	Steve Muckle	2010-10-08	1	-1/+9
\| \| \| \| \| \| \|	Board configuration for MSM8X60 simulation. Signed-off-by: Steve Muckle <smuckle@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
*	msm: add msm8x60_surf machine	Steve Muckle	2010-10-08	1	-0/+7
\| \| \| \| \|	Signed-off-by: Steve Muckle <smuckle@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
*	msm: 8x60: setup correct handlers for private interrupts	Abhijeet Dharmapurikar	2010-10-08	1	-1/+1
\| \| \| \| \| \| \| \|	Private Peripheral interrupts could be edge triggered or level triggered depending on the platform. Initialize handlers for these in board file. Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
*	msm: 8x60: gic initialization fixup for RUMI	Steve Muckle	2010-10-08	1	-0/+20
\| \| \| \| \| \| \| \| \| \|	On RUMI platform STIs are not enabled by default, contrary to the GIC spec. The bits for STIs in the enable/enable clear registers are also RW instead of RO. STIs need to be enabled at initialization time. Signed-off-by: Steve Muckle <smuckle@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
*	msm: MSM8X60 RUMI3 board support	Steve Muckle	2010-10-08	1	-0/+58
	Board configuration for MSM8X60 emulation on RUMI3. Signed-off-by: Steve Muckle <smuckle@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>