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| * | | msm: Remove broken register definition from troutDavid Brown2011-01-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Missed a register change with the clock cleanup on the MSM7x01 targets. Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | Merge branch 'msm-8960' into msm-coreDavid Brown2011-01-2616-90/+582
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * msm-8960: msm: Support for the MSM8960 RUMI3 target msm: Support for the MSM8960 Simulator target msm: Makefile cleanup msm: timer: Timer support for MSM8960 msm: Add MSM 8960 cpu_is check msm: irqs-8960: Interrupt map for MSM8960 msm: Physical offset for MSM8960 msm: io: I/O register definitions for MSM8960 msm: Generalize QGIC registers msm: Generalize timer register mappings msm: Add CPU queries
* | \ \ \ Merge branch 'msm-sdcc' into for-nextDavid Brown2011-01-245-5/+314
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * msm-sdcc: msm: 8x50: Add initial support for SDCC mmc: msm_sdcc: Add gpio handling function to driver drivers: mmc: msm: remove clock disable in probe mmc: msm: fix dma usage not to use internal APIs
| * | | | | msm: 8x50: Add initial support for SDCCSahitya Tummala2011-01-214-5/+303
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
| * | | | | mmc: msm_sdcc: Add gpio handling function to driverSahitya Tummala2011-01-211-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Configure SDCC GPIOs when the host is powered up or powered off. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
* | | | | | Merge branch 'msm-8960' into for-nextDavid Brown2011-01-2416-90/+582
|\ \ \ \ \ \ | | |_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * msm-8960: msm: Support for the MSM8960 RUMI3 target msm: Support for the MSM8960 Simulator target msm: Makefile cleanup msm: timer: Timer support for MSM8960 msm: Add MSM 8960 cpu_is check msm: irqs-8960: Interrupt map for MSM8960 msm: Physical offset for MSM8960 msm: io: I/O register definitions for MSM8960 msm: Generalize QGIC registers msm: Generalize timer register mappings msm: Add CPU queries
| * | | | | msm: Support for the MSM8960 RUMI3 targetStepan Moskovchenko2011-01-212-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the machine record, init code, and build support for the MSM8960 RUMI3. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | | msm: Support for the MSM8960 Simulator targetStepan Moskovchenko2011-01-213-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the board file, Kconfig options, and Makefile options needed to build for the MSM8960 Simulator target. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | | msm: Makefile cleanupStepan Moskovchenko2011-01-211-12/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up some of the conditionals in the Makefile in preparation for adding build support for MSM8960. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | | msm: timer: Timer support for MSM8960Stepan Moskovchenko2011-01-211-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the macros in the MSM timer driver to support the MSM8960 chip. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | | msm: Add MSM 8960 cpu_is checkDavid Brown2011-01-211-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | | msm: irqs-8960: Interrupt map for MSM8960Stepan Moskovchenko2011-01-212-0/+296
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the interrupt map for the Qualcomm MSM8960 chip. This chip has an interrupt map that is different from previous targets. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | | msm: Physical offset for MSM8960Stepan Moskovchenko2011-01-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the physical memory offset value for the Qualcomm MSM8960 chip. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | | msm: io: I/O register definitions for MSM8960Stepan Moskovchenko2011-01-214-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the register address definitions for the basic hardware blocks on the Qualcomm MSM8960 chip. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | | msm: Generalize QGIC registersDavid Brown2011-01-213-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QGIC registers are mapped to the same virtual addresses across targets, only the physical address changes. Move the BASE address out of target-specific files, and add a SOC name to the base addresses. Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | | msm: Generalize timer register mappingsDavid Brown2011-01-217-70/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow the timer register to be determined dynamically instead of at compile time. Use common virtual addresses for the registers across all MSM chips, and select the register mappings based on the detected CPU. Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | | | msm: Add CPU queriesDavid Brown2011-01-211-0/+48
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create runtime queries to distinguish the various MSM targets. Although these would probably be better named soc_is..., use cpu_is... to match convention in the rest of the kernel. Hard code the tests based on config options for now. When runtime device detection is implemented, these can be made dynamic. Signed-off-by: David Brown <davidb@codeaurora.org>
* | | | | Merge branch 'msm-uart' into for-nextDavid Brown2011-01-243-2/+7
|\ \ \ \ \ | |_|/ / / |/| | | | | | | | | | | | | | | | | | | * msm-uart: serial: msm: Add support for UARTDM cores msm: Add name field to UART resources
| * | | | msm: Add name field to UART resourcesStepan Moskovchenko2011-01-213-2/+7
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a name field to the I/O resources for the UARTs on MSM targets in preparation for updates to the msm_serial driver. The driver assumed there is one I/O resource per UART, which is not the case on all targets. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | | ARM: msm: 7x30: don't force a gpiomux table for the whole archDima Zavin2011-01-243-39/+23
| |/ / |/| | | | | | | | | | | | | | | | | | | | This is completely board specific and therefore must be provided on a per-board basis. Signed-off-by: Dima Zavin <dima@android.com> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | Merge branch 'for-38-rc2' of git://codeaurora.org/quic/kernel/davidb/linux-msmLinus Torvalds2011-01-201-2/+2
|\ \ \ | |/ / |/| | | | | | | | * 'for-38-rc2' of git://codeaurora.org/quic/kernel/davidb/linux-msm: msm: qsd8x50: Platform data isn't init data
| * | msm: qsd8x50: Platform data isn't init dataStephen Boyd2010-12-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Remove the SMC91x platform and resource data from initdata. These will continue to be accessed after init, and must remain available. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-01-155-121/+118
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits) ARM: pxa: fix building issue of missing physmap.h ARM: mmp: PXA910 drive strength FAST using wrong value ARM: mmp: MMP2 drive strength FAST using wrong value ARM: pxa: fix recursive calls in pxa_low_gpio_chip AT91: Support for gsia18s board AT91: Acme Systems FOX Board G20 board files AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h ARM: pxa: fix suspend/resume array index miscalculation ARM: pxa: use cpu_has_ipr() consistently in irq.c ARM: pxa: remove unused variable in clock-pxa3xx.c ARM: pxa: fix warning in zeus.c ARM: sa1111: fix typo in sa1111_retrigger_lowirq() ARM mxs: clkdev related compile fixes ARM i.MX mx31_3ds: Fix MC13783 regulator names ARM: plat-stmp3xxx: irq_data conversion. ARM: plat-spear: irq_data conversion. ARM: plat-orion: irq_data conversion. ARM: plat-omap: irq_data conversion. ARM: plat-nomadik: irq_data conversion. ARM: plat-mxc: irq_data conversion. ... Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert Buytenhek's irq_data conversion clashing with some omap irq updates)
| * | | ARM: msm: irq_data conversion.Lennert Buytenhek2011-01-135-121/+118
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Acked-by: Gregory Bean <gbean@codeaurora.org> Acked-by: Daniel Walker <dwalker@codeaurora.org>
* | | | Merge branch 'for-next' of ↵Linus Torvalds2011-01-132-2/+2
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits) Documentation/trace/events.txt: Remove obsolete sched_signal_send. writeback: fix global_dirty_limits comment runtime -> real-time ppc: fix comment typo singal -> signal drivers: fix comment typo diable -> disable. m68k: fix comment typo diable -> disable. wireless: comment typo fix diable -> disable. media: comment typo fix diable -> disable. remove doc for obsolete dynamic-printk kernel-parameter remove extraneous 'is' from Documentation/iostats.txt Fix spelling milisec -> ms in snd_ps3 module parameter description Fix spelling mistakes in comments Revert conflicting V4L changes i7core_edac: fix typos in comments mm/rmap.c: fix comment sound, ca0106: Fix assignment to 'channel'. hrtimer: fix a typo in comment init/Kconfig: fix typo anon_inodes: fix wrong function name in comment fix comment typos concerning "consistent" poll: fix a typo in comment ... Fix up trivial conflicts in: - drivers/net/wireless/iwlwifi/iwl-core.c (moved to iwl-legacy.c) - fs/ext4/ext4.h Also fix missed 'diabled' typo in drivers/net/bnx2x/bnx2x.h while at it.
| * | | Merge branch 'master' into for-nextJiri Kosina2010-12-221-1/+1
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS arch/arm/mach-omap2/pm24xx.c drivers/scsi/bfa/bfa_fcpim.c Needed to update to apply fixes for which the old branch was too outdated.
| * | | | fix comment typos concerning "consistent"Uwe Kleine-König2010-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
| * | | | tree-wide: fix comment/printk typosUwe Kleine-König2010-11-011-1/+1
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "gadget", "through", "command", "maintain", "maintain", "controller", "address", "between", "initiali[zs]e", "instead", "function", "select", "already", "equal", "access", "management", "hierarchy", "registration", "interest", "relative", "memory", "offset", "already", Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | | | msm: add SMP support for msmJeff Ohlstein2011-01-074-0/+208
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | | msm: hotplug: support cpu hotplug on msmJeff Ohlstein2011-01-072-0/+93
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | | msm: timer: SMP timer support for msmJeff Ohlstein2011-01-073-24/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The msm provides timer hardware that is private to each core. Each timer has separate counter and match registers, so we create separate clock_event_devices for each core. For the global clocksource, use cpu 0's counter. Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | | msm: scm-boot: Support for setting cold/warm boot addressesStepan Moskovchenko2011-01-073-1/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for setting the cold boot address of core 1 and the warm boot addresses of cores 0 and 1 using a secure domain call. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | | msm: Secure Channel Manager (SCM) supportStephen Boyd2011-01-074-0/+333
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SCM is the protocol used to communicate between the secure and non-secure code executing on the applications processor. The non-secure side uses a physically contiguous buffer to pass information to the secure side; where the buffer conforms to a format that is agreed upon by both sides. The use of a buffer allows multiple pending requests to be in flight on the secure side. It also benefits use cases where the command or response buffer contains large chunks of data. Reviewed-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | | Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-01-064-11/+7
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (416 commits) ARM: DMA: add support for DMA debugging ARM: PL011: add DMA burst threshold support for ST variants ARM: PL011: Add support for transmit DMA ARM: PL011: Ensure IRQs are disabled in UART interrupt handler ARM: PL011: Separate hardware FIFO size from TTY FIFO size ARM: PL011: Allow better handling of vendor data ARM: PL011: Ensure error flags are clear at startup ARM: PL011: include revision number in boot-time port printk ARM: vexpress: add sched_clock() for Versatile Express ARM i.MX53: Make MX53 EVK bootable ARM i.MX53: Some bug fix about MX53 MSL code ARM: 6607/1: sa1100: Update platform device registration ARM: 6606/1: sa1100: Fix platform device registration ARM i.MX51: rename IPU irqs ARM i.MX51: Add ipu clock support ARM: imx/mx27_3ds: Add PMIC support ARM: DMA: Replace page_to_dma()/dma_to_page() with pfn_to_dma()/dma_to_pfn() mx51: fix usb clock support MX51: Add support for usb host 2 arch/arm/plat-mxc/ehci.c: fix errors/typos ...
| * \ \ \ Merge branch 'misc' into develRussell King2011-01-061-2/+2
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
| | * | | | ARM: SMP: pass an ipi number to smp_cross_call()Russell King2010-12-031-2/+2
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Merge branch 'clksrc' into develRussell King2011-01-052-4/+3
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-vexpress/v2m.c arch/arm/plat-omap/counter_32k.c arch/arm/plat-versatile/Makefile
| | * | | | ARM: MSM: update clock source registrationRussell King2010-12-221-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In d7e81c2 (clocksource: Add clocksource_register_hz/khz interface) new interfaces were added which simplify (and optimize) the selection of the divisor shift/mult constants. Switch over to using this new interface. Tested-By: Jeff Ohlstein <johlstei@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | | Merge branch 'for-russell' of ↵Russell King2010-11-261-0/+2
| | |\ \ \ \ | | | |/ / / | | |/| | | | | | | | | git://codeaurora.org/quic/kernel/dwalker/linux-msm into devel-stable
| | | * | | arm: kconfig: enable SMP for MSM targetsDaniel Walker2010-11-221-0/+2
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This just adds ARCH_MSM_SCORPIONMP to allow SMP selection for MSM. MSM is unique in that it doesn't enable SCU or TWD. Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
| * | | | ARM: GIC: consolidate gic_cpu_base_addr to common GIC codeRussell King2010-12-141-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: GIC: provide a single initialization function for boot CPURussell King2010-12-141-2/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6484/1: fix compile warning in mm/init.cAnand Gadiyar2010-11-211-1/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7c63984b86 (ARM: do not define VMALLOC_END relative to PAGE_OFFSET) changed VMALLOC_END to be an explicit value. Before this, it was relative to PAGE_OFFSET and therefore converted to unsigned long as PAGE_OFFSET is an unsigned long. This introduced the following build warning. Fix this by changing the explicit defines of VMALLOC_END to be unsigned long. CC arch/arm/mm/init.o arch/arm/mm/init.c: In function 'mem_init': arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int' Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Acked-by: Uwe Kleine-K <u.kleine-koenig@pengutronix.dee> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | MSM: Add USB support for MSM7x30Pavankumar Kondeti2010-12-163-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add USB OTG, peripheral and host devices. This patch also adds usb_phy_clk which is required for resetting the PHY. VBUS power up and shutdown routines depends on PMIC module. As PMIC driver is unavailable, configure USB in peripheral only mode. Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | MSM: Add USB suport for QSD8x50Pavankumar Kondeti2010-12-163-0/+92
| |/ |/| | | | | | | | | | | | | | | | | | | | | OTG driver takes care of putting hardware into low power mode. Hence make peripheral and host devices as children of OTG device and let runtime PM takes care of notifying peripheral and host state to OTG device. VBUS power up and shutdown routines are implemented by modem processor. As RPC infrastructure is not available, configure USB in peripheral only mode. Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: initial framebuffer supportDaniel Walker2010-12-154-0/+369
| | | | | | | | | | | | | | | | | | Initial framebuffer components. Add board-trout-panel.c as well as platform parts to enable the framebuffer. This code comes directly from Google's tree. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: add handling for clocks tagged as CLK_MINMAXDaniel Walker2010-12-151-0/+15
| | | | | | | | | | | | | | | | | | CLK_MINMAX is used to denote clocks that have a wide variation in possible frequencies. This handling just sets the min and max values to the same value. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: trout: change name of pmdh_clk to mddi_clkDaniel Walker2010-12-151-1/+1
| | | | | | | | | | | | | | | | | | This clock is used in the framebuffer driver as mddi_clk. This just changes the name to match that. This also mirrors a change in Google tree. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: add CLK_MINMAX to pmdh_clkDaniel Walker2010-12-151-1/+1
| | | | | | | | | | | | | | | | This adds in the CLK_MINMAX flag to the pmdh_clk since it's actual a min/max clock instead of a single frequency clock. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | msm: trout: add gpio_to_irqDaniel Walker2010-12-151-0/+8
| | | | | | | | | | | | | | | | | | trout has gpiolib support and interrupt support, but was missing the gpio_to_irq function. This adds that functions which should allow proper translation. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
generated by cgit v1.1 at 2024-06-07 17:23:11 +0000