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* ARM: Remove dependency of plat-orion time code on mach directory includes.Lennert Buytenhek2011-03-031-0/+1
| | | | | | | | | | | This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* [ARM] orion5x: register the crypto device on SOCs that support itNicolas Pitre2009-06-151-1/+0
| | | | | | Not all Orion variants do implement the crypto unit. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion5x: add sram support for cryptoSebastian Andrzej Siewior2009-06-081-0/+2
| | | | | | | | | | | | The security accelerator which can act as a puppet player for the crypto engine requires its commands in the sram. This patch adds support for the phys mapping and creates a platform device for the actual driver. [ nico: renamed device name from "mv,orion5x-crypto" to "mv_crypto" so to match the module name and be more generic for Kirkwood use ] Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: share GPIO handling codeLennert Buytenhek2008-12-201-7/+0
| | | | | | | | Split off Orion GPIO handling code into plat-orion/, and add support for multiple sets of (32) GPIO pins. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: instantiate the dsa switch driverLennert Buytenhek2008-10-191-0/+2
| | | | | | | | | | | | | This adds DSA switch instantiation hooks to the orion5x and the kirkwood ARM SoC platform code, and instantiates the DSA switch driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE RD, the Linksys WRT350n v2, and the 88F6281 RD boards. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Tested-by: Nicolas Pitre <nico@marvell.com> Tested-by: Peter van Valderen <linux@ddcrew.com> Tested-by: Dirk Teurlings <dirk@upexia.nl> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* Merge branch 'for-rmk' of git://git.marvell.com/orionRussell King2008-10-091-0/+2
|\ | | | | | | Merge branch 'orion-devel' into devel
| * [ARM] Orion: add 88F6183 (Orion-1-90) supportLennert Buytenhek2008-09-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | The Orion-1-90 (88F6183) is another member of the Orion SoC family, which has a 16 bit DDR2 interface, one x1 PCIe port (configurable as Root Complex or Endpoint), one 10/100/1000 ethernet interface, one USB 2.0 port with PHY, one SPDIF/I2S interface, one SDIO interface, one TWSI interface, two UARTs, one SPI interface, a NAND controller, a crypto engine, and a 4-channel DMA engine. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Orion: prepare for runtime-determined timer tick rateLennert Buytenhek2008-09-251-0/+1
| | | | | | | | | | | | | | | | | | | | Currently, orion5x uses a hardcoded timer tick rate of 166 MHz, but the actual timer tick rate varies between different members of the SoC family (and can vary based on strap pin settings). This patch prepares for runtime determination of the timer tick rate. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* | [ARM] Orion: Fix boot crash on Kurobox ProPer Andersson2008-08-211-0/+1
|/ | | | | | | | | | | The Kurobox Pro crashes when any of the PCI controller registers are accessed. This patch adds a function to the Orion PCI handling code that board support code can call to disable enumerating the PCI bus entirely, and makes the Kurobox Pro PCI-related init code call this function. Signed-off-by: Per Andersson <avtobiff@gmail.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Orion: Instantiate mv_xor driver for 5182Saeed Bishara2008-08-091-0/+1
| | | | | Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Orion: make PCI handling code deal with Cardbus slotsLennert Buytenhek2008-06-301-0/+1
| | | | | | | | | | | | | | | | The Cardbus connector does not have an IDSEL signal, and Cardbus cards are always the intended target of configuration transactions on their local PCI bus. This means that if the Orion's PCI bus signals are hooked up to a Cardbus slot, the same set of PCI functions will will appear 31 times, for each of the PCI device IDs 1-31 (ID 0 is the host bridge). This patch adds a function to the Orion PCI handling code that board support code can call to enable Cardbus mode. When Cardbus mode is enabled, configuration transactions on the PCI local bus are only allowed to PCI IDs 0 (host bridge) and 1 (cardbus device). Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* [ARM] Orion: rework MPP handlingLennert Buytenhek2008-06-221-1/+1
| | | | | | | | | | | | Instead of having board code poke directly into the MPP configuration registers, and separately calling orion5x_gpio_set_valid_pins() to indicate which MPP pins can be used as GPIO pins, introduce a helper function for configuring the roles of each of the MPP pins, and have that helper function handle gpio validity internally. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Sylver Bruneau <sylver.bruneau@googlemail.com> Acked-by: Russell King <linux@arm.linux.org.uk>
* [ARM] Orion: move EHCI/I2C/UART peripheral init into board codeLennert Buytenhek2008-06-221-22/+13
| | | | | | | | | | | | | | | | | This patch moves initialisation of EHCI/I2C/UART platform devices from the common orion5x_init() into the board support code. The rationale behind this is that only the board support code knows whether certain peripherals have been brought out on the board, and not initialising peripherals that haven't been brought out is desirable for example: - to reduce user confusion (e.g. seeing both 'eth0' and 'eth1' appear while there is only one ethernet port on the board); and - to allow for future power savings (peripherals that have not been brought out can be clock gated off entirely). Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <linux@arm.linux.org.uk>
* [ARM] Orion: use mv643xx_eth driver mbus window handlingLennert Buytenhek2008-05-091-1/+0
| | | | | | | | | | | Make the Orion 5x platform code use the mbus window handling code that's in the mv643xx_eth driver, instead of programming the GigE block's mbus window registers by hand. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: fix ->map_irq() PCIe bus number checkLennert Buytenhek2008-04-281-2/+1
| | | | | | | | | | | | | | | | The current orion5x board ->map_irq() routines check whether a given bus number lives on the PCIe controller by comparing it with the PCIe controller's primary bus number. This doesn't work in case there are multiple buses in the PCIe domain, i.e. if there exists a PCIe bridge on the primary PCIe bus. This patch adds a helper function (orion5x_pci_map_irq()) that returns the IRQ number for the given PCI device if that device has a hard-wired IRQ, or -1 otherwise, and makes each board's ->map_irq() function use this helper function. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* Orion: orion -> orion5x renameLennert Buytenhek2008-03-271-0/+72
Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e. not the plat-orion bits.) Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Saeed Bishara <saeed@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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