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* merge more graphics stuff from 3.2.72Wolfgang Wiedmeyer2015-10-231-121/+2
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* ARM: mach-ux500: unlock I&D l2x0 caches before initLinus Walleij2011-11-111-1/+24
| | | | | | | | | | | | | | | | | | | | | | | commit 1bf6d2c1bb23533af6930581cc39b74685bc29de upstream. Apparently U8500 U-Boot versions may leave the l2x0 locked down before executing the kernel. Make sure we unlock it before we initialize the l2x0. This fixes a performance problem reported by Jan Rinze. The l2x0 core has been modified to unlock the l2x0 by default, but it will not touch the locking registers if the l2x0 was already enabled, as on the ux500, so we need this quirk to make sure it is properly turned off. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Adrian Bunk <adrian.bunk@movial.com> Reported-by: Jan Rinze <janrinze@gmail.com> Tested-by: Robert Marklund <robert.marklund@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* mfd: add DB5500 PRCMU driverLinus Walleij2011-05-241-0/+3
| | | | | | | | | This adds the DB5500 PRCMU driver. Right now this one is pretty restricted in functionality, exposing a simple interface to send I2C messages. Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* mach-ux500: move the DB8500 PRCMU driver to MFDLinus Walleij2011-05-241-1/+1
| | | | | | | | | | | | | | | | | | | We have decided that this function arbiter fits better in the MFD subsystem. Since we need to concatenate the split header files we move it basically like this: mv mach-ux500/prcmu-db8500.c drivers/mfd/db8500-prcmu.c mv mach-ux500/include/mach/prcmu-defs.h include/linux/mfd/db8500-prcmu.h mv mach-ux500/include/mach/prcmu-regs.h drivers/mfd/db8500-prcmu-regs.h mach-ux500/include/mach/prcmu.h >> include/linux/mfd/db8500-prcmu.h rm arch/arm/mach-ux500/include/mach/prcmu.h Then we update different #include statements and Makefile orders etc to make the PRCMU driver compile, link and boot in the new place without really changing any code. Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* mach-ux500: make PRCMU base address dynamicLinus Walleij2011-05-241-0/+2
| | | | | | | This makes the PRCMU base address be selected at runtime for U8500 and U5500 instead of being compiled-in. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ux500: dynamic SOC detectionRabin Vincent2011-01-101-4/+0
| | | | | | | Dynamically detect the DBx500 SOC an revision based on the ASIC ID. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
* ux500: remove build-time changing macrosRabin Vincent2011-01-101-35/+39
| | | | | | | | | To allow the possiblity of building U8500 and U5500 support in the same image. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> [Rebased to latest changes in Russells tree] Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
* Merge branch 'devel-stable' into develRussell King2011-01-061-10/+3
|\ | | | | | | | | | | Conflicts: arch/arm/mach-pxa/clock.c arch/arm/mach-pxa/clock.h
| * ux500: Call prmcu_init only for u8500Per Forlin2010-12-081-1/+2
| | | | | | | | | | | | | | | | PRCMU driver only supports u8500. Don't initialize prcmu if running on u5500. Signed-off-by: Per Forlin <per.forlin@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
| * ARM: ux500: prcmu db8500 v2 supportMattias Wallin2010-12-081-0/+2
| | | | | | | | | | | | | | | | | | This patch adds support for db8500 chip version 2. The TCDM memory address of the PRCMU is changed and dynamic detection of that is added. Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
| * ux500: rework device registrationRabin Vincent2010-12-081-10/+0
| | | | | | | | | | | | | | | | | | | | Change the Ux500 devices to be dynamically allocated and added by calling functions instead of referencing structures, thereby allowing 5500 and other derivatives' support to be added without having to duplicate structures, use fixup functions, or use compile-time macros. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
* | ARM: GIC: provide a single initialization function for boot CPURussell King2010-12-141-2/+2
|/ | | | | | | | | Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6473/1: Small update to ux500 specific L2 cache codePer Fransson2010-11-211-3/+3
| | | | | | | | This change updates the ux500 specific outer cache code to use the new *_relaxed() I/O accessors. Signed-off-by: Per Fransson <per.xx.fransson@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: ux500 specific L2 cache codePer Fransson2010-10-261-0/+45
| | | | | | | | | | | | | | | The generic version of l2x0_inv_all is only called just after disabling the L2 cache and is surrounded by a spinlock. However, we're not really turning off the L2 cache right now, and the PL310 does not support exclusive accesses (used to implement the spinlock). So, the invalidation needs to be done without the spinlock. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Hans-Juergen Koch <hjk@linutronix.de> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Per Fransson <per.xx.fransson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
* ARM: 6145/1: ux500 MTU clockrate correctionLinus Walleij2010-05-271-0/+6
| | | | | | | | | | | | | | | | | | This adjusts the clockrate for the MTU timer. On the different UX500 variants this rate is different. The platform can also have been set up at hardware initialization, bootloader or early init for different clock speeds. To have the clock framework available early so the timers can use them, the clock initialization for Nomadik and ux500 is moved to IRQ init time. A custom per-clock callback is added to handle special cases like this. This solves a user-visible bug: without this patch the current UX500 platforms will not be synchronized to wall-clock time and the platform will drift in time. Acked-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6087/1: ux500: move sys_timer to cpu.cRabin Vincent2010-05-041-0/+21
| | | | | | | | | Move the common system timer setup code to cpu.c. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6082/1: ux500: put common devices into devices.cRabin Vincent2010-05-041-0/+10
| | | | | | | | | | Introduce devices.c, for placing devices common among Ux500 SoCs. Start with the PL031 device. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6080/1: ux500: move irq and common maps to cpu.cRabin Vincent2010-05-041-0/+68
Move IRQ initialization and common io mapping setup code to cpu.c, renaming U8500* to UX500* along the way. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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