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* merge more graphics stuff from 3.2.72Wolfgang Wiedmeyer2015-10-231-0/+1
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* plat-mxc: iomux-v3.h: implicitly enable pull-up/down when that's desiredPaul Fertser2011-11-111-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | commit 6571534b600b8ca1936ff5630b9e0947f21faf16 upstream. To configure pads during the initialisation a set of special constants is used, e.g. #define MX25_PAD_FEC_MDIO__FEC_MDIO IOMUX_PAD(0x3c4, 0x1cc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP) The problem is that no pull-up/down is getting activated unless both PAD_CTL_PUE (pull-up enable) and PAD_CTL_PKE (pull/keeper module enable) set. This is clearly stated in the i.MX25 datasheet and is confirmed by the measurements on hardware. This leads to some rather hard to understand bugs such as misdetecting an absent ethernet PHY (a real bug i had), unstable data transfer etc. This might affect mx25, mx35, mx50, mx51 and mx53 SoCs. It's reasonable to expect that if the pullup value is specified, the intention was to have it actually active, so we implicitly add the needed bits. Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* MXC: iomux-v3: correct NO_PAD_CTRL definitionTroy Kisky2011-10-031-1/+1
| | | | | | | | | | | | | | | | | | | | commit 425933b30b0ccfac58065bca6c853ea627443cdf upstream. iomux-v3.c uses NO_PAD_CTRL as a 32 bit value so it should not be shifted left by MUX_PAD_CTRL_SHIFT(41) Previously, anything requesting NO_PAD_CTRL would get their pad control register set to 0. Since it is a pad control mask, place it with the other mask values. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Lothar Waßmann <LW@KARO-electronics.de> Tested-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: John Ogness <john.ogness@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* arm: mxc: move IOMUX_CONFIG_SION definition to iomux-v3.hRichard Zhao2011-01-071-0/+1
| | | | | Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX51: Full iomux supportSascha Hauer2010-12-151-0/+2
| | | | | | | | This iomux file has been constructed from the Freescale pinmux tool. It contains all pins from the tool, but the datasheet lists some configurations not present in the tool, these are not yet added. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC IOMUX-V3 replace struct pad_desc with bitmapped cookie (step 2)Lothar Waßmann2010-12-151-53/+37
| | | | | | | | | | | | | | | | | | | This patch actually replaces the 'struct pad_desc' with a u64 cookie to facilitate adding platform specific pad_ctrl settings to an existing pad definition. So, instead of: iomux_v3_cfg_t power_key = MX51_PAD_EIM_A27__GPIO_2_21; power_key.pad_ctrl = MX51_GPIO_PAD_CTRL_2; mxc_iomux_v3_setup_pad(&power_key); one can write: mxc_iomux_v3_setup_pad((MX51_PAD_EIM_A27__GPIO_2_21 & ~MUX_PAD_CTRL_MASK) | MX51_GPIO_PAD_CTRL_2); Patch applies to branch 'imx-for-2.6.38' of git://git.pengutronix.de/git/imx/linux-2.6 Signed-Off-By: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX IOMUX-V3 replace struct pad_desc with bitmapped cookieLothar Waßmann2010-11-241-4/+34
| | | | | | | | | | | | | | The following patch is a first step to convert the 'struct pad_desc' to a bitmapped cookie to facilitate adding platform specific pullup or drive strength definitions to existing pad definitions without need to rewrite the complete pad def. The patch wraps 'struct pad_desc' in an opaque data type and introduces macros to access the individual members. This patch does not constitute any functional change! Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc/iomux: add GPIO bank offset for iomux v3 platformsJason Wang2010-07-261-0/+15
| | | | | | | | | | These GPIO bank offsets are useful when define a gpio number. E.G. when GPIO PORTC pin 6 is used for irq request pin of external expanding device, we can define it like: #define EXP_PARENT_IRQ_PIN (GPIO_PORTC + 6) Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc: Core support for Freescale i.MX5 seriesAmit Kucheria2010-02-091-3/+5
| | | | | | | Add basic clock support, cpu identification, I/O mapping, interrupt controller, serial port and ethernet. Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
* mxc: iomux v3: remove resource handlingSascha Hauer2009-11-241-16/+1
| | | | | | | The current model does not allow to put a pad into different modes once a pins is allocated. Remove the resource handling. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* iomux-v3: Allow for a runtime base addressSascha Hauer2009-08-141-0/+5
| | | | | | | also, check for a valid pad_ctrl_ofs before changing the pad control register. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC iomux-v3: Fix defines for PAD_CTL registersSascha Hauer2009-08-071-17/+13
| | | | | | | The old defines leaked in from an old version of the patch. Change the defines to match the register layout of the iomuxer. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC: Add iomux support for MX35 SoCsSascha Hauer2009-05-071-0/+121
This iomux is called iomux-v3 in the tree because it is the third known incarnation of MXC iomuxers. It is not only found on the MX35 but also on the MX51 and probably others. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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