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* Merge branch 'for-rmk' of git://git.marvell.com/orionRussell King2008-10-0931-66/+1305
|\ | | | | | | Merge branch 'orion-devel' into devel
| * [ARM] Feroceon: small cleanups to L2 cache codeNicolas Pitre2008-09-301-17/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - Make sure that coprocessor instructions for range ops are contiguous and not reordered. - s/invalidate_and_disable_dcache/flush_and_disable_dcache/ - Don't re-enable I/D caches if they were not enabled initially. - Change some masks to shifts for better generated code. Signed-off-by: Nicolas Pitre <nico@marvell.com> Acked-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Orion: Add Buffalo Linkstation Mini power-off methodAlexey Kopytko2008-09-251-0/+20
| | | | | | | | | | | | | | | | | | | | | | This patch adds specific power-off method for Buffalo Linkstation Mini board. The board has a hardware switch which should be monitored from userspace. When the switch is in OFF position the board should be rebooted and U-Boot will start in an idle mode and wait for the user to move the power switch back to ON position. Signed-off-by: Alexey Kopytko <alexey@kopytko.ru> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Orion: Add Buffalo Linkstation Mini supportAlexey Kopytko2008-09-254-0/+268
| | | | | | | | | | | | | | This patch adds support for Buffalo Linkstation Mini board. Signed-off-by: Alexey Kopytko <alexey@kopytko.ru> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: add support for L2 cache WB/WT selectionRonen Shitrit2008-09-253-7/+25
| | | | | | | | | | | | | | | | Feroceon L2 cache can work in eighther write through or write back mode on Kirkwood. Add the option to configure this mode according to Kconfig. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] EDMINIV2: add support for LED and power buttonAlbert Aribaud2008-09-251-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | This patch provides standard GPIO LED control for the ED Mini V2, with software blinking only (CPLD hardware blinking capability is not used). This patch also provides status of the power button as a standard GPIO input event. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: allow configuring mbus window for on-chip sramLennert Buytenhek2008-09-252-4/+9
| | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Kirkwood: remove uart1 init calls for boards that don't expose uart1Ronen Shitrit2008-09-252-2/+0
| | | | | | | | | | | | | | | | Remove uart1 init calls for boards that use the physical pins onto which the UART1 signals are multiplexed for different purposes. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Kirkwood: add support for newer SoC modelsRonen Shitrit2008-09-254-9/+56
| | | | | | | | | | | | | | | | | | | | | | | | Add support to the Kirkwood port for newer device models and silicon revisions. Instead of looking at the DEVICE_ID register, the device version is now determined by looking at the PCI-Express device ID and revision registers, as it is done for orion5x, and this information is used to determine the TCLK frequency, again, as it is done for orion5x. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Kirkwood: prepare for runtime-determined timer tick rateRonen Shitrit2008-09-252-7/+16
| | | | | | | | | | | | | | | | | | | | Currently, kirkwood uses a hardcoded timer tick rate of 166 MHz, but the actual timer tick rate varies between different members of the SoC family. This patch prepares for runtime determination of the timer tick rate. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
| * [ARM] Orion: add RD88F6183AP-GE supportLennert Buytenhek2008-09-254-0/+125
| | | | | | | | | | | | | | | | | | The RD88F6183AP-GE is an access point reference design for the 88F6183 SoC, with a 88E6161 six-port gigabit ethernet switch with five PHYs (providing 1 WAN and 4 LAN ports and an interface to the CPU), and a mini-PCIe slot for a wireless card. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Orion: add 88F6183 (Orion-1-90) supportLennert Buytenhek2008-09-254-2/+54
| | | | | | | | | | | | | | | | | | | | | | The Orion-1-90 (88F6183) is another member of the Orion SoC family, which has a 16 bit DDR2 interface, one x1 PCIe port (configurable as Root Complex or Endpoint), one 10/100/1000 ethernet interface, one USB 2.0 port with PHY, one SPDIF/I2S interface, one SDIO interface, one TWSI interface, two UARTs, one SPI interface, a NAND controller, a crypto engine, and a 4-channel DMA engine. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Orion: add Buffalo Terastation Pro II/Live supportSylver Bruneau2008-09-253-0/+376
| | | | | | | | | | | | | | This patch adds support for the Buffalo Terastation Pro II/Live. Signed-off-by: Sylver Bruneau <sylver.bruneau@googlemail.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Orion: add LaCie Ethernet Disk mini V2 supportChristopher Moore2008-09-254-0/+211
| | | | | | | | | | | | | | | | This patch adds support for the LaCie Ethernet Disk mini V2. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Signed-off-by: Christopher Moore <moore@free.fr> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Orion: prepare for runtime-determined timer tick rateLennert Buytenhek2008-09-255-9/+20
| | | | | | | | | | | | | | | | | | | | Currently, orion5x uses a hardcoded timer tick rate of 166 MHz, but the actual timer tick rate varies between different members of the SoC family (and can vary based on strap pin settings). This patch prepares for runtime determination of the timer tick rate. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] mv78xx0: wire up ethernet error interruptLennert Buytenhek2008-09-255-7/+28
| | | | | | | | | | | | | | | | | | Wire up the ethernet port's error interrupt so that the mv643xx_eth driver can sleep for SMI event completion instead of having to busy-wait for it. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: wire up ethernet error interruptLennert Buytenhek2008-09-252-1/+7
| | | | | | | | | | | | | | | | Wire up the ethernet port's error interrupt so that the mv643xx_eth driver can sleep for SMI event completion instead of having to busy-wait for it. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
| * [ARM] Orion: wire up ethernet error interruptLennert Buytenhek2008-09-251-1/+5
| | | | | | | | | | | | | | | | Wire up the ethernet port's error interrupt so that the mv643xx_eth driver can sleep for SMI event completion instead of having to busy-wait for it. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* | Merge branch 'for-rmk' of git://source.mvista.com/git/linux-davinci-2.6.gitRussell King2008-10-0914-184/+719
|\ \ | | | | | | | | | Merge branch 'davinci' into devel
| * | ARM: DaVinci: evm sets up many devicesDavid Brownell2008-09-171-15/+322
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update DaVinci EVM board setup to work with key drivers which are now in mainline kernels: - I2C adapter (driver: i2c_davinci) * three gpio expanders (driver: pcf8574) used for - LEDs - audio codec control - misc device control (including USB VBUS, IDE-vs-CF) * at24 (driver: at24) eeprom - USB controller (driver: musb_hdrc) - IDE controller (driver: palm_bk3710) This board is the first in-tree client for a number of those drivers, and adding this board support means the EVM board can be used for some "real work" ... excepting "DaVinci Technology" video and DSP support (also available in most OMAP3 chips). Also renames the flash as "evm_norflash", since NAND may be jumpered. (Patch contains work by myself, Kevin Hilman, Sergei Shtylyov.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
| * | ARM: DaVinci: usb setupDavid Brownell2008-09-173-1/+120
| | | | | | | | | | | | | | | | | | | | | Declare the musb_hdrc platform device for DaVinci. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | ARM: DaVinci: i2c setupKomal Shah2008-09-173-3/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Davinci I2C initialization infrastructure; will be used by EVM init. [ dbrownell@users.sourceforge.net: pass platform data into init code ] Signed-off-by: Komal Shah <komal_shah802003@yahoo.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
| * | ARM: DaVinci: SOC GPIOs use gpiolibDavid Brownell2008-09-173-101/+106
| | | | | | | | | | | | | | | | | | | | | | | | Switch DaVinci SOC gpios over to using the new GPIO library, so it can access GPIO expanders and other non-SOC GPIOs using the same calls. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | ARM: DaVinci: Update IO address pointer typecheckingKevin Hilman2008-09-172-31/+14
| | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | [ARM] Fix PCI_DMA_BUS_IS_PHYS for ARMRussell King2008-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI_DMA_BUS_IS_PHYS was defined to be zero, which meant we ignored the DMA mask for IDE and SCSI transfers. This is wrong - we have no DMA translation hardware. We want to obey DMA masks so that the block layer performs bouncing itself. Reported-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | Merge branch 'for-rmk' of ↵Russell King2008-09-131-1/+1
| |\ \ | | | | | | | | | | | | git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6.git
| | * | pcm037: add rts/cts support for serial portSascha Hauer2008-09-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have rts/cts pins on the first serial port on the pcm037. Enable it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | [ARM] 5247/1: tosa: SW_EAR_IN supportDmitry Baryshkov2008-09-131-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] 5246/1: tosa: add proper clock alias for tc6393xb clockDmitry Baryshkov2008-09-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock alias for clock that is used by tc6393xb device on tosa. As that chip plays pretty major part in tosa life and is currently disabled, this is 2.4.27 material. Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] OMAP: Fix MMC device dataRussell King2008-09-111-32/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAPs MMC device data was passing the wrong structure via the platform device. Moreover, a missing function means that both sx1_defconfig and omap_h2_1610_defconfig builds failed with undefined reference to `omap_set_mmc_info' errors. Fix this by updating the MMC support from the omapzoom tree. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge branch 'for-rmk' of ↵Russell King2008-10-0927-115/+1270
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6.git Merge branch 'imx-devel' into devel
| * | | | MX2: Add DMA support for mx2 and (eventually) mx1Sascha Hauer2008-09-093-1/+930
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DMA support for Freescale i.MX27 SoCs. It is derived from the i.MX1 port and should (though currently untested) still be working for the i.MX1. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | i.MX: Add FIQ supportPaulius Zaleckas2008-09-092-4/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drivers which are going to use it will have to select it and use imx_set_irq_fiq() to set FIQ mode for this interrupt. Changes since V1: - removed '#ifdef CONFIG_FIQ' from irqs.h - renamed imx_set_irq_type() to imx_set_irq_fiq() - made irqt unsigned - fixed irq number check Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | MXC: Remove WD IRQ priority settingDarius Augulis2008-09-091-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove WD IRQ priority setting from ARCH_MXC common init code, because it's application specific. Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | i.MX3: Fix compiler warningsLuotao Fu2008-09-094-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix some base address declaration by adding a cast. Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | MXC: add RTCK alternate function definitionsLuotao Fu2008-09-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This one adds definitions to configure RTCK pad (PE16) in primary and alternate function. The RTCK Pin is used by one wire master controller and as JTAG Clock return. Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | mxc: add cscr register defintionsLuotao Fu2008-09-091-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds macros to get CSCR upper, lower and additional registers. These registers are needed to configure a chip select line. The offset layouts of these Registers are identical on mx27 and mx31, hence we can use the macros in generic way Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | MX31: add macros to configure spi pinsLuotao Fu2008-09-091-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this adds convenience values usable by mxc_iomux_mode() to configure Pins of the spi interfaces on mx31. Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | MXC: Lets handle IRQ by priority, defined with exported API functionDarius Augulis2008-09-094-11/+48
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | i.MX31ADS: Add CPLD interrupts demultiplexing (take 3).Gilles Chanteperdrix2008-09-092-1/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed for 8250 serial port and CS89x0 ethernet interface. Signed-off-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | i.MX31ADS: Enable the first IMX serial port. (take 3)Gilles Chanteperdrix2008-09-091-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | i.MX27: add definitions for USB pinsSascha Hauer2008-09-091-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | i.MX2: make SoC devices globally availableSascha Hauer2008-09-094-52/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make SoC devices globally available to boards rather than using a device specific init function. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | i.MX3: make SoC devices globally availableSascha Hauer2008-09-093-40/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make SoC devices globally available to boards rather than using a device specific init function. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | MXC: add convenience function to register platform devicesSascha Hauer2008-09-093-1/+40
| |/ / / | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'pxa-all' into develRussell King2008-10-09132-3886/+11620
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-pxa/Kconfig arch/arm/mach-pxa/corgi.c arch/arm/mach-pxa/include/mach/hardware.h arch/arm/mach-pxa/spitz.c
| * | | | [ARM] 5239/1: Palm Zire 72 power management supportSergey Lapin2008-10-092-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains Palm Zire 72 power management support. Depends on #5238/1 Signed-off-by: Sergey Lapin <slapin@ossfans.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] 5298/1: Drop desc_handle_irq()Dmitry Baryshkov2008-10-0942-162/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | desc_handle_irq() was declared as obsolete since long ago. Replace it with generic_handle_irq() Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] pxa: add preliminary CPUFREQ support for PXA3xxEric Miao2008-10-072-0/+259
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.hEric Miao2008-10-071-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.1 at 2024-09-12 17:16:11 +0000