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* Merge remote-tracking branch 'cyanogen/cm-13.0' into replicant-6.0replicant-6.0-alpha-0001Wolfgang Wiedmeyer2015-12-2614-0/+14
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| * Enable IDIV emulation for any device using cm-13.0rogersb112015-12-2314-0/+14
| | | | | | | | Change-Id: I9cf4c2606e91b5be5bf4d7b0dada5a966fb87230
| * i9300: we have bluetooth deadlocksSimon Shields2015-12-211-0/+1
| | | | | | | | Change-Id: I5f98f69759b024c160ebee7b1dc939a89f2d5ca5
| * ARM: 7527/1: uaccess: explicitly check __user pointer when !CPU_USE_DOMAINSRussell King2015-12-184-25/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The {get,put}_user macros don't perform range checking on the provided __user address when !CPU_HAS_DOMAINS. This patch reworks the out-of-line assembly accessors to check the user address against a specified limit, returning -EFAULT if is is out of range. [will: changed get_user register allocation to match put_user] [rmk: fixed building on older ARM architectures] CRs-Fixed: 504011 Reported-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Git-commit: 8404663f81d212918ff85f493649a7991209fa04 Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Conflicts: arch/arm/include/asm/assembler.h arch/arm/lib/getuser.S arch/arm/lib/putuser.S Change-Id: I3818045a136fcdf72deb1371b132e090fd7ed643
* | ARM: 7527/1: uaccess: explicitly check __user pointer when !CPU_USE_DOMAINSRussell King2015-12-215-17/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The {get,put}_user macros don't perform range checking on the provided __user address when !CPU_HAS_DOMAINS. This patch reworks the out-of-line assembly accessors to check the user address against a specified limit, returning -EFAULT if is is out of range. [will: changed get_user register allocation to match put_user] [rmk: fixed building on older ARM architectures] CRs-Fixed: 504011 Reported-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Git-commit: 8404663f81d212918ff85f493649a7991209fa04 Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Conflicts: arch/arm/include/asm/assembler.h arch/arm/lib/getuser.S arch/arm/lib/putuser.S Change-Id: I3818045a136fcdf72deb1371b132e090fd7ed643 Conflicts: arch/arm/lib/getuser.S arch/arm/lib/putuser.S
* | i9300: we have bluetooth deadlocksSimon Shields2015-12-211-0/+1
| | | | | | | | Change-Id: I5f98f69759b024c160ebee7b1dc939a89f2d5ca5
* | remove quemu hack for software rendering as there is now a much better solutionWolfgang Wiedmeyer2015-12-211-1/+1
| | | | | | | | Signed-off-by: Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de>
* | set quemu=1 to get software renderingWolfgang Wiedmeyer2015-12-151-1/+1
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* | set selinux to permissive for nowWolfgang Wiedmeyer2015-12-141-1/+1
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* | Merge remote-tracking branch 'cyanogen/cm-13.0' into replicant-6.0Wolfgang Wiedmeyer2015-12-1421-1/+359
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| * i9300: enable IDIV emulationSimon Shields2015-12-091-0/+1
| | | | | | | | Change-Id: Iacf2f02620a1144dfdde616ea01414e0e76ab32e
| * arm/traps: get full DIV instruction in thumb modeMichael Gernoth2015-12-091-0/+13
| | | | | | | | Change-Id: Ie60d2124d7835e85f03008d3dfe259b70490b4f2
| * arm: add SDIV/UDIV emulation for ARMv7 processorsVladimir Murzin2015-12-093-0/+222
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Virtualization Extensions introduce the requirement for an ARMv7-A implementation to include SDIV and UDIV. Any implementation of the Virtualization Extensions must include the SDIV and UDIV instructions in the Thumb and ARM instruction sets. In an ARMv7-A implementation that does not include the Virtualization Extensions, it is IMPLEMENTATION DEFINED whether: * SDIV and UDIV are not implemented * SDIV and UDIV are implemented only in the Thumb instruction set * SDIV and UDIV are implemented in the Thumb and ARM instruction sets. This patch adds a handler to trap and emulate unimplemented SDIV and UDIV instructions in ARM and Thumb modes. Also some basic statistic is exported via /proc/cpu/idiv_emulation Change-Id: I8e721ecac62a05fab42ed7db7951b4c837a59bc7 Signed-off-by: Vladimir Murzin <murzin.v@gmail.com>
| * ARM: 7206/1: Add generic ARM instruction set condition code checks.Leif Lindholm2015-12-093-1/+93
| | | | | | | | | | | | | | | | | | | | | | | | This patch breaks the ARM condition checking code out of nwfpe/fpopcode.{ch} into a standalone file for opcode operations. It also modifies the code somewhat for coding style adherence, and adds some temporary variables for increased readability. Change-Id: I9935fbdebff9ddd263007412edd6a2b3eb06ae69 Signed-off-by: Leif Lindholm <leif.lindholm@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * Enable optimized AES and SHA1 routinesrogersb112015-12-0815-0/+30
| | | | | | | | Change-Id: I5bc8fa43ea6ebabc893df6bd203656bec66f7db2
| * Display correct kernel version in CM defconfig filesrogersb112015-12-0815-15/+15
| | | | | | | | Change-Id: I24670b8b8cf76fdc386a9e2592a370a11114aa82
* | Display correct kernel version in CM defconfig filesupstreamingrogersb112015-12-0815-15/+15
| | | | | | | | Change-Id: I24670b8b8cf76fdc386a9e2592a370a11114aa82
* | Merge commit 'afabf37012e839802f9f3819f621e16aa4acefd2' into upstreamingWolfgang Wiedmeyer2015-12-0829-254/+2393
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | update from cm-13.0 Conflicts: Makefile crypto/algapi.c drivers/char/diag/diagchar.h drivers/char/diag/diagchar_core.c drivers/misc/Makefile kernel/timeconst.pl
| * i9300: use lzma for kernel compressionforkbomb2015-12-021-2/+2
| | | | | | | | Change-Id: I108fc60dad0a6a5401d6bcdbc3e29dfe15bed167
| * t0lte: Enable zram 2/2rogersb112015-12-021-3/+4
| | | | | | | | Change-Id: I4ed713ec9281a4e313f314b2e04ab3aea1c0d5e6
| * Enable zRAM for i9100 and i777 [2/2]Caio Schnepper2015-12-022-6/+8
| | | | | | | | | | | | -Needs http://review.cyanogenmod.org/#/c/111996 Change-Id: If8cc973909ace34465a0c355fc1ccc87af911889
| * Enable UID_CPUTIME and profilingrogersb112015-12-0214-11/+25
| | | | | | | | Change-Id: Ie06e9dcec7b3ff764779ad42753bcd31a767a614
| * t0lte:Use lzma for compressionrogersb112015-11-301-2/+2
| | | | | | | | Change-Id: Ie51affdf3fd45ccc450f401117043f98e11a76bd
| * n51xx : use LZMA instead of GZIP to reduce recovery sizeRGIB2015-11-303-6/+6
| | | | | | | | Change-Id: Ia2c272ef71349659ee479f9ceaea80c91c309733
| * t0ltecdma: use lzma for kernel compressionDan Pasanen2015-11-261-2/+2
| | | | | | | | | | | | * recovery image is now too big :( Change-Id: Ie51707f544f8397f563f08fc0ed5c3d7a3c2f827
| * i9300: enable zram [2/2]forkbomb2015-11-241-3/+4
| | | | | | | | Change-Id: Ia90fe3253d25fdfa11a887c4899afd85cc4b532f
| * 4412: Update the rest of the configs for hardware=smdk4x12rogersb112015-11-117-21/+21
| | | | | | | | Change-Id: I7120e38069e3faeae35f139ef60fe9507fcbe356
| * smdk4210: Add androidboot.hardware=smdk4210 parametersCaio Schnepper2015-11-114-12/+12
| | | | | | | | Change-Id: I36c07bd373ca05881b94475098c12650712fbcb2
| * Merge remote-tracking branch 'korg/linux-3.0.y' into cm-13.0rogersb112015-11-1012-23/+42
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: crypto/algapi.c drivers/gpu/drm/i915/i915_debugfs.c drivers/gpu/drm/i915/intel_display.c drivers/video/fbmem.c include/linux/nls.h kernel/cgroup.c kernel/signal.c kernel/timeconst.pl net/ipv4/ping.c Change-Id: I1f532925d1743df74d66bcdd6fc92f05c72ee0dd
| | * ARM: PCI: versatile: Fix SMAP register offsetsPeter Maydell2013-09-261-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 99f2b130370b904ca5300079243fdbcafa2c708b upstream. The SMAP register offsets in the versatile PCI controller code were all off by four. (This didn't have any observable bad effects because on this board PHYS_OFFSET is zero, and (a) writing zero to the flags register at offset 0x10 has no effect and (b) the reset value of the SMAP register is zero anyway, so failing to write SMAP2 didn't matter.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * ARM: 7080/1: l2x0: make sure I&D are not locked down on initLinus Walleij2013-08-202-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit bac7e6ecf60933b68af910eb4c83a775a8b20b19 upstream. Fighting unfixed U-Boots and other beasts that may the cache in a locked-down state when starting the kernel, we make sure to disable all cache lock-down when initializing the l2x0 so we are in a known state. Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Jan Rinze <janrinze@gmail.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Adrian Bunk <adrian.bunk@movial.com> Cc: Rob Herring <robherring2@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Tested-by: Robert Marklund <robert.marklund@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * ARM: 7765/1: perf: Record the user-mode PC in the call chain.Jed Davis2013-07-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit c5f927a6f62196226915f12194c9d0df4e2210d7 upstream. With this change, we no longer lose the innermost entry in the user-mode part of the call chain. See also the x86 port, which includes the ip. It's possible to partially work around this problem by post-processing the data to use the PERF_SAMPLE_IP value, but this works only if the CPU wasn't in the kernel when the sample was taken. Signed-off-by: Jed Davis <jld@mozilla.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * Kirkwood: Enable PCIe port 1 on QNAP TS-11x/TS-21xMartin Michlmayr2013-06-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 99e11334dcb846f9b76fb808196c7f47aa83abb3 upstream. Enable KW_PCIE1 on QNAP TS-11x/TS-21x devices as newer revisions (rev 1.3) have a USB 3.0 chip from Etron on PCIe port 1. Thanks to Marek Vasut for identifying this issue! Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Tested-by: Marek Vasut <marex@denx.de> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * ARM: plat-orion: Fix num_resources and id for ge10 and ge11Gregory CLEMENT2013-06-071-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 2b8b2797142c7951e635c6eec5d1705ee9bc45c5 upstream. When platform data were moved from arch/arm/mach-mv78xx0/common.c to arch/arm/plat-orion/common.c with the commit "7e3819d ARM: orion: Consolidate ethernet platform data", there were few typo made on gigabit Ethernet interface ge10 and ge11. This commit writes back their initial value, which allows to use this interfaces again. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * ARM: OMAP: RX-51: change probe order of touchscreen and panel SPI devicesAaro Koskinen2013-05-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit e65f131a14726e5f1b880a528271a52428e5b3a5 upstream. Commit 9fdca9df (spi: omap2-mcspi: convert to module_platform_driver) broke the SPI display/panel driver probe on RX-51/N900. The exact cause is not fully understood, but it seems to be related to the probe order. SPI communication to the panel driver (spi1.2) fails unless the touchscreen (spi1.0) has been probed/initialized before. When the omap2-mcspi driver was converted to a platform driver, it resulted in that the devices are probed immediately after the board registers them in the order they are listed in the board file. Fix the issue by moving the touchscreen before the panel in the SPI device list. The patch fixes the following failure: [ 1.260955] acx565akm spi1.2: invalid display ID [ 1.265899] panel-acx565akm display0: acx_panel_probe panel detect error [ 1.273071] omapdss CORE error: driver probe failed: -19 Tested-by: Sebastian Reichel <sre@debian.org> Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Pali Rohár <pali.rohar@gmail.com> Cc: Joni Lapilainen <joni.lapilainen@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * ARM: 7696/1: Fix kexec by setting outer_cache.inv_all for FeroceonIllia Ragozin2013-04-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit cd272d1ea71583170e95dde02c76166c7f9017e6 upstream. On Feroceon the L2 cache becomes non-coherent with the CPU when the L1 caches are disabled. Thus the L2 needs to be invalidated after both L1 caches are disabled. On kexec before the starting the code for relocation the kernel, the L1 caches are disabled in cpu_froc_fin (cpu_v7_proc_fin for Feroceon), but after L2 cache is never invalidated, because inv_all is not set in cache-feroceon-l2.c. So kernel relocation and decompression may has (and usually has) errors. Setting the function enables L2 invalidation and fixes the issue. Signed-off-by: Illia Ragozin <illia.ragozin@grapecom.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * signal: Define __ARCH_HAS_SA_RESTORER so we know whether to clear sa_restorerBen Hutchings2013-04-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vaguely based on upstream commit 574c4866e33d 'consolidate kernel-side struct sigaction declarations'. flush_signal_handlers() needs to know whether sigaction::sa_restorer is defined, not whether SA_RESTORER is defined. Define the __ARCH_HAS_SA_RESTORER macro to indicate this. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Cc: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * ARM: fix scheduling while atomic warning in alignment handling codeRussell King2013-03-141-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit b255188f90e2bade1bd11a986dd1ca4861869f4d upstream. Paolo Pisati reports that IPv6 triggers this warning: BUG: scheduling while atomic: swapper/0/0/0x40000100 Modules linked in: [<c001b1c4>] (unwind_backtrace+0x0/0xf0) from [<c0503c5c>] (__schedule_bug+0x48/0x5c) [<c0503c5c>] (__schedule_bug+0x48/0x5c) from [<c0508608>] (__schedule+0x700/0x740) [<c0508608>] (__schedule+0x700/0x740) from [<c007007c>] (__cond_resched+0x24/0x34) [<c007007c>] (__cond_resched+0x24/0x34) from [<c05086dc>] (_cond_resched+0x3c/0x44) [<c05086dc>] (_cond_resched+0x3c/0x44) from [<c0021f6c>] (do_alignment+0x178/0x78c) [<c0021f6c>] (do_alignment+0x178/0x78c) from [<c00083e0>] (do_DataAbort+0x34/0x98) [<c00083e0>] (do_DataAbort+0x34/0x98) from [<c0509a60>] (__dabt_svc+0x40/0x60) Exception stack(0xc0763d70 to 0xc0763db8) 3d60: e97e805e e97e806e 2c000000 11000000 3d80: ea86bb00 0000002c 00000011 e97e807e c076d2a8 e97e805e e97e806e 0000002c 3da0: 3d000000 c0763dbc c04b98fc c02a8490 00000113 ffffffff [<c0509a60>] (__dabt_svc+0x40/0x60) from [<c02a8490>] (__csum_ipv6_magic+0x8/0xc8) Fix this by using probe_kernel_address() stead of __get_user(). Reported-by: Paolo Pisati <p.pisati@gmail.com> Tested-by: Paolo Pisati <p.pisati@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * ARM: VFP: fix emulation of second VFP instructionRussell King2013-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 5e4ba617c1b584b2e376f31a63bd4e734109318a upstream. Martin Storsjö reports that the sequence: ee312ac1 vsub.f32 s4, s3, s2 ee702ac0 vsub.f32 s5, s1, s0 e59f0028 ldr r0, [pc, #40] ee111a90 vmov r1, s3 on Raspberry Pi (implementor 41 architecture 1 part 20 variant b rev 5) where s3 is a denormal and s2 is zero results in incorrect behaviour - the instruction "vsub.f32 s5, s1, s0" is not executed: VFP: bounce: trigger ee111a90 fpexc d0000780 VFP: emulate: INST=0xee312ac1 SCR=0x00000000 ... As we can see, the instruction triggering the exception is the "vmov" instruction, and we emulate the "vsub.f32 s4, s3, s2" but fail to properly take account of the FPEXC_FP2V flag in FPEXC. This is because the test for the second instruction register being valid is bogus, and will always skip emulation of the second instruction. Reported-by: Martin Storsjö <martin@martin.st> Tested-by: Martin Storsjö <martin@martin.st> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * ARM: PXA3xx: program the CSMSADRCFG registerIgor Grinberg2013-02-282-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit d107a204154ddd79339203c2deeb7433f0cf6777 upstream. The Chip Select Configuration Register must be programmed to 0x2 in order to achieve the correct behavior of the Static Memory Controller. Without this patch devices wired to DFI and accessed through SMC cannot be accessed after resume from S2. Do not rely on the boot loader to program the CSMSADRCFG register by programming it in the kernel smemc module. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | Board smdk4x12: Add androidboot.hardware=smdk4x12 to kernel cmdlinerogersb112015-10-234-12/+12
| | | | | | | | | | | | Change-Id: If3b1181253a7dbdb839146b3793ceee5e31fae6e
| * | ARM: Exynos: Call cpu_pm_enter/exit in Low Power States.Christian Neumüller2015-07-011-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In low power cpuidle states, the FPU registers get corrupted. By calling cpu_pm_enter, the VFP module gets notified so that it saves the FPU state and restores it from RAM the next time a thread uses it. The comments at cpu_pm_enter/exit indicate that these functions must be called with interrupts disabled, so place the calls between local_irq_disable/local_irq_enble. See http://forum.xda-developers.com/showthread.php?p=57637134 to http://forum.xda-developers.com/showthread.php?p=57643086. Change-Id: Icde0ab93734cf2a4febfabc3c04e77ce955bd9da
| * | ARM: gic: Use cpu pm notifiers to save gic stateColin Cross2015-07-011-0/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the cpu is powered down in a low power mode, the gic cpu interface may be reset, and when the cpu cluster is powered down, the gic distributor may also be reset. This patch uses CPU_PM_ENTER and CPU_PM_EXIT notifiers to save and restore the gic cpu interface registers, and the CPU_CLUSTER_PM_ENTER and CPU_CLUSTER_PM_EXIT notifiers to save and restore the gic distributor registers. Merge note: Samsung had already applied the changes to struct gic_chip_data, although it still remains in the .c file instead of having been moved to the header. Original-author: Gary King <gking@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Conflicts: arch/arm/include/asm/hardware/gic.h Change-Id: I50b5cdd161637ff7b871ac5ffb30d669ec60c662
| * | ARM: Enable CPU_PM notifiers on ARM machines.Santosh Shilimkar2015-07-011-0/+1
| | | | | | | | | | | | | | | | | | | | | Change-Id: Ifecfa0399e7fca47c43e4f24225448d6ff3780f4 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
| * | ARM: 7873/1: vfp: clear vfp_current_hw_state for dying cpuYuanyuan Zhong2015-07-011-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CPU_DYING notifier is called by cpu stopper task which does not own the context held in the VFP hardware. Calling vfp_force_reload() has no effect. Replace it with clearing vfp_current_hw_state. Change-Id: If6ea6b94e04dc4588c5bf2ec0fad4d0dcc49ffd6 Signed-off-by: Yuanyuan Zhong <zyy@motorola.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Lanchon <lanchon@gmail.com>
| * | ARM: 7419/1: vfp: fix VFP flushing regression on sigreturn pathWill Deacon2015-07-011-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ff9a184c ("ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handler") flushes the VFP state prior to entering a signal handler so that a VFP operation inside the handler will trap and force a restore of ABI-compliant registers. Reflushing and disabling VFP on the sigreturn path is predicated on the saved thread state indicating that VFP was used by the handler -- however for SMP platforms this is only set on context-switch, making the check unreliable and causing VFP register corruption in userspace since the register values are not necessarily those restored from the sigframe. This patch unconditionally flushes the VFP state after a signal handler. Since we already perform the flush before the handler and the flushing itself happens lazily, the redundant flush when VFP is not used by the handler is essentially a nop. Change-Id: Ia9ec6384fae3281def1dc93914af336857a09949 Reported-by: Jon Medhurst <tixy@linaro.org> Signed-off-by: Jon Medhurst <tixy@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Lanchon <lanchon@gmail.com>
| * | ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handlerWill Deacon2015-07-011-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM PCS mandates that the length and stride bits of the fpscr are cleared on entry to and return from a public interface. Although signal handlers run asynchronously with respect to the interrupted function, the handler itself expects to run as though it has been called like a normal function. This patch updates the state mirroring the VFP hardware before entry to a signal handler so that it adheres to the PCS. Furthermore, we disable VFP to ensure that we trap on any floating point operation performed by the signal handler and synchronise the hardware appropriately. A check is inserted after the signal handler to avoid redundant flushing if VFP was not used. Change-Id: Ic16296179773f609e2768c89756a0abece1a3247 Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Lanchon <lanchon@gmail.com>
| * | ARM: 7399/1: vfp: move user vfp state save/restore code out of signal.cWill Deacon2015-07-013-51/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The user VFP state must be preserved (subject to ucontext modifications) across invocation of a signal handler and this is currently handled by vfp_{preserve,restore}_context in signal.c Since this code requires intimate low-level knowledge of the VFP state, this patch moves it into vfpmodule.c. Change-Id: Ib82f326e7815d139b696d1db6a357769b449c1f3 Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Lanchon <lanchon@gmail.com>
| * | ARM: vfp: Use cpu pm notifiers to save vfp stateColin Cross2015-07-011-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the cpu is powered down in a low power mode, the vfp registers may be reset. This patch uses CPU_PM_ENTER and CPU_PM_EXIT notifiers to save and restore the cpu's vfp registers. Change-Id: I805e18a5b705202f63748136c2608ce80d2d5f20 Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Lanchon <lanchon@gmail.com>
| * | ARM: vfp: ensure that thread flushing works if preemptedRussell King2015-07-011-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prevent a preemption event causing the initialized VFP state being overwritten by ensuring that the VFP hardware access is disabled prior to starting initialization. We can then do this in safety while still allowing preemption to occur. Change-Id: I93922d95f641aa989b2acefe009a656e27d4d9bf Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Lanchon <lanchon@gmail.com>
generated by cgit v1.1 at 2024-05-10 02:39:40 +0000