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* Merge git://git.kernel.org/pub/scm/linux/kernel/git/nico/orion into devel-stableRussell King2011-05-034-52/+2
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| * ARM: PJ4: remove the ARMv6 compatible cache method entriesNicolas Pitre2011-05-032-40/+0
| | | | | | | | | | | | | | | | | | The Marvell PJ4 is ARMv7 capable, so we don't support it in ARMv6 mode anymore. Signed-off-by: Nicolas Pitre <nico@fluxnic.net> Acked-by: Saeed Bishara <saeed.bishara@gmail.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
| * ARM: Sync Marvell Dove defconfig with latest kernelKonstantin Porotchkin2011-05-031-9/+1
| | | | | | | | | | | | | | Re-generate defconfig for Marvell Dove platform Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
| * ARM: Moving Marvell Dove platform defaults to ARMv7Konstantin Porotchkin2011-05-032-3/+1
| | | | | | | | | | | | | | | | Disabled legacy support for ARMv6 architecture on Dove platform. Latest Dove HW uses only ARMv7 model. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
* | Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-05-0219-343/+519
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: (47 commits) CLKDEV: Fix clkdev return value for NULL clk case ARM: 6891/1: prevent heap corruption in OABI semtimedop ARM: kprobes: Tidy-up kprobes-decode.c ARM: kprobes: Add emulation of hint instructions like NOP and WFI ARM: kprobes: Add emulation of SBFX, UBFX, BFI and BFC instructions ARM: kprobes: Add emulation of MOVW and MOVT instructions ARM: kprobes: Reject probing of undefined data processing instructions ARM: kprobes: Remove redundant code in space_1111 ARM: kprobes: Fix emulation of PLD instructions ARM: kprobes: Reject probing of SETEND instructions ARM: kprobes: Consolidate stub decoding functions ARM: kprobes: Reject probing of all coprocessor instructions ARM: kprobes: Fix emulation of USAD8 instructions ARM: kprobes: Fix emulation of SMUAD, SMUSD and SMMUL instructions ARM: kprobes: Fix emulation of SXTB16, SXTB, SXTH, UXTB16, UXTB and UXTH instructions ARM: kprobes: Reject probing of undefined media instructions ARM: kprobes: Add emulation of RBIT instruction ARM: kprobes: Reject probing of LDRB instructions which load PC ARM: kprobes: Fix emulation of LDRD and STRD instructions ARM: kprobes: Reject probing of LDR/STR instructions which update PC unpredictably ...
| * | ARM: 6891/1: prevent heap corruption in OABI semtimedopDan Rosenberg2011-04-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_OABI_COMPAT is set, the wrapper for semtimedop does not bound the nsops argument. A sufficiently large value will cause an integer overflow in allocation size, followed by copying too much data into the allocated buffer. Fix this by restricting nsops to SEMOPM. Untested. Cc: stable@kernel.org Signed-off-by: Dan Rosenberg <drosenberg@vsecurity.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | Merge branch 'kprobes' of git://git.linaro.org/people/nico/linux into fixesRussell King2011-04-293-321/+462
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| | * | ARM: kprobes: Tidy-up kprobes-decode.cJon Medhurst2011-04-281-108/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Remove coding standard violations reported by checkpatch.pl - Delete comment about handling of conditional branches which is no longer true. - Delete comment at end of file which lists all ARM instructions. This duplicates data available in the ARM ARM and seems like an unnecessary maintenance burden to keep this up to date and accurate. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Add emulation of hint instructions like NOP and WFIJon Medhurst2011-04-281-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Being able to probe NOP instructions is useful for hard-coding probeable locations and is used by the kprobes test code. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Add emulation of SBFX, UBFX, BFI and BFC instructionsJon Medhurst2011-04-281-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These bit field manipulation instructions occur several thousand times in an ARMv7 kernel. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Add emulation of MOVW and MOVT instructionsJon Medhurst2011-04-281-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MOVW and MOVT instructions account for approximately 7% of all instructions in a ARMv7 kernel as GCC uses them instead of a literal pool. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Reject probing of undefined data processing instructionsJon Medhurst2011-04-281-14/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The instruction decoding in space_cccc_000x needs to reject probing of instructions with undefined patterns as they may in future become defined and then emulated faultily - as has already happened with the SMC instruction. This fix is achieved by testing for the instruction patterns we want to probe and making the the default fall-through paths reject probes. This also allows us to remove some explicit tests for instructions that we wish to reject, as that is now the default action. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Remove redundant code in space_1111Jon Medhurst2011-04-281-9/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tests to explicitly reject probing CPS, RFE and SRS instructions are redundant as the default case is now to reject undecoded patterns. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix emulation of PLD instructionsJon Medhurst2011-04-281-13/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PLD instructions wasn't being decoded correctly and the emulation code wasn't adjusting PC correctly. As the PLD instruction is only a performance hint we emulate it as a simple nop, and we can broaden the instruction decoding to take into account newer PLI and PLDW instructions. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Reject probing of SETEND instructionsJon Medhurst2011-04-281-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The emulation of SETEND was broken as it changed the endianess for the running kprobes handling code. Rather than adding a new simulation routine to fix this we'll just reject probing of SETEND as these should be very rare in the kernel. Note, the function emulate_none is now unused but it is left in the source code as future patches will use it. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Consolidate stub decoding functionsJon Medhurst2011-04-281-31/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following the change to remove support for coprocessor instructions we are left with three stub functions which can be consolidated. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Reject probing of all coprocessor instructionsJon Medhurst2011-04-281-102/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel doesn't currently support VFP or Neon code, and probing of code with CP15 operations is fraught with bad consequences. Therefore we don't need the ability to probe coprocessor instructions and the code to support this can be removed. The removed code also had at least two bugs: - MRC into R15 should set CPSR not trash PC - LDC and STC which use PC as base register needed the address offset by 8 Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix emulation of USAD8 instructionsJon Medhurst2011-04-281-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USAD8 instruction wasn't being explicitly decoded leading to the incorrect emulation routine being called. It can be correctly decoded in the same way as the signed multiply instructions so we move the decoding there. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix emulation of SMUAD, SMUSD and SMMUL instructionsJon Medhurst2011-04-281-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The signed multiply instructions were being decoded incorrectly. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix emulation of SXTB16, SXTB, SXTH, UXTB16, UXTB and UXTH ↵Jon Medhurst2011-04-281-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | instructions These sign extension instructions are encoded as extend-and-add instructions where the register to add is specified as r15. The decoding routines weren't checking for this and were using the incorrect emulation code, giving incorrect results. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Reject probing of undefined media instructionsJon Medhurst2011-04-281-1/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The instructions space for media instructions contains some undefined patterns. We need to reject probing of these because they may in future become defined and the kprobes code may then emulate them faultily. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Add emulation of RBIT instructionJon Medhurst2011-04-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The v6T2 RBIT instruction was accidentally being emulated correctly, this patch adds correct decoding for the instruction. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Reject probing of LDRB instructions which load PCJon Medhurst2011-04-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These instructions are specified as UNPREDICTABLE. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix emulation of LDRD and STRD instructionsJon Medhurst2011-04-281-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The decoding of these instructions got the register indexed and immediate indexed forms the wrong way around, causing incorrect emulation. Instructions like "LDRD Rx, [Rx]" were corrupting Rx because the base register writeback was being performed unconditionally, overwriting the value just loaded from memory. The fix is to only writeback the base register when that form of the instruction is used. Note, now that we reject probing writeback with PC the emulation code doesn't need the check rn!=15. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Reject probing of LDR/STR instructions which update PC ↵Jon Medhurst2011-04-281-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | unpredictably Using PC as an base register with writeback is UNPREDICTABLE, as is non word-sized loads or stores of PC. (We only really care about preventing loads to PC but it keeps the code simpler if we also exclude stores.) Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix emulation of LDRH, STRH, LDRSB and LDRSH instructionsJon Medhurst2011-04-281-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The decoding of these instructions got the register indexed and immediate indexed forms the wrong way around, causing incorrect emulation. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Reject probing of STREX and LDREX instructionsJon Medhurst2011-04-281-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The emulation code for STREX and LDREX instructions is faulty, however, rather than attempting to fix this we reject probes of these instructions. We do this because they can never succeed in gaining exclusive access as the exception framework clears the exclusivity monitor when a probes breakpoint is hit. (This is a general problem when probing all instructions executing between a LDREX and its corresponding STREX and can lead to infinite retry loops.) Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Reject probing of undefined multiply instructionsJon Medhurst2011-04-281-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The instructions space for 'Multiply and multiply-accumulate' instructions contains some undefined patterns. We need to reject probing of these because they may in future become defined and the kprobes code may then emulate them faultily. This has already happened with the new MLS instruction which this patch also adds correct decoding for as well as tightening up other decoding tests. (Before this patch the wrong emulation routine was being called for MLS though it still produced correct results.) Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix error in commentJon Medhurst2011-04-281-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Reject probing of instructions which write to PC unpredictably.Jon Medhurst2011-04-281-0/+28
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix emulation of MRS instructionJon Medhurst2011-04-281-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MRS instruction should set mode and interrupt bits in the read value so it is simpler to use a new simulation routine (simulate_mrs) rather than some modified emulation. prep_emulate_rd12 is now unused and removed. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Reject probing MRS instructions which read SPSRJon Medhurst2011-04-281-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to reject probing of instructions which read SPSR because we can't handle this as the value in SPSR is lost when the exception handler for the probe breakpoint first runs. This patch also fixes the bitmask for MRS instructions decoding to include checking bits 5-7. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix emulation of Data-processing (immediate) instructionsJon Medhurst2011-04-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Emulation of instructions like "ADD rd, rn, #<const>" would result in a corrupted value for rd. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix emulation of CMP, CMN, TST and TEQ instructions.Jon Medhurst2011-04-281-2/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Probing these instructions was corrupting R0 because the emulation code didn't account for the fact that they don't write a result to a register. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Remove redundant condition checks from simulation routinesJon Medhurst2011-04-281-27/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have the framework code handling conditionally executed instructions we can remove redundant checks in individual simulation routines. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | ARM: kprobes: Fix probing of conditionally executed instructionsJon Medhurst2011-04-283-1/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a kprobe is placed onto conditionally executed ARM instructions, many of the emulation routines used to single step them produce corrupt register results. Rather than fix all of these cases we modify the framework which calls them to test the relevant condition flags and, if the test fails, skip calling the emulation code. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | kprobes/arm: Fix ldrd/strd emulationViktor Rosendahl2011-04-281-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently emulate_ldrd and emulate_strd don't even have the adjustment of the PC value, so in case of Rn == PC, it will not update the PC incorrectly but instead load/store from the wrong address. Let's add both the adjustment of the PC value and the check for PC == PC. Signed-off-by: Viktor Rosendahl <viktor.rosendahl@nokia.com> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * | | Merge branch 'fix' of ↵Russell King2011-04-283-3/+3
| |\ \ \ | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into fixes
| | * | | ARM: Fix .size directive for xscale_dma_a0_map_areaBen Hutchings2011-04-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas used to accept (and ignore?) .size directives which referred to undefined symbols, as this does. In binutils 2.21 these are treated as fatal errors. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | ARM: pxa/magician: bq24022 regulator needs to be enabledPhilipp Zabel2011-04-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add REGULATOR_CHANGE_STATUS flag to magician bq24022 regulator to enable charging. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | ARM: pxa/hx4700: bq24022 regulator needs to be enabledPaul Parsons2011-04-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add REGULATOR_CHANGE_STATUS flag to hx4700 bq24022 regulator. Without this flag the bq24022 cannot be enabled and the battery will not charge. Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Cc: Philipp Zabel <philipp.zabel@gmail.com> Tested-by: Dmitry Artamonow <mad_soft@inbox.ru> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * | | | ARM: 6887/1: Mark broadcast_timer_setup() __cpuinitStephen Boyd2011-04-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function is only called by percpu_timer_setup() which is also __cpuinit marked. Thus it's safe to mark this function as __cpuinit as well. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6884/1: Fix infinite loop in ARM user perf_event backtrace codeSonny Rao2011-04-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM user backtrace code can get into an infinite loop if it runs into an invalid stack frame which points back to itself. This situation has been observed in practice. Fix it by capping the number of entries in the backtrace. This is also what other architectures do in their backtrace code. Signed-off-by: Sonny Rao <sonnyrao@chromium.org> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Merge branch 'davinci-fixes' of ↵Russell King2011-04-2712-41/+40
| |\ \ \ \ | | | | | | | | | | | | | | | | | | git://gitorious.org/linux-davinci/linux-davinci into fixes
| | * | | | ARM: Davinci: Fix I2C build errorsRussell King - ARM Linux2011-04-251-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several Davinci platforms select the I2C EEPROM support, but don't select I2C support. This causes I2C EEPROM support to be built into the kernel, but I2C support may not be configured to be built in. This leads to linker errors due to missing I2C symbols. Arrange for I2C to be selected whenever EEPROM_AT24 is selected. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| | * | | | DA830: fix SPI1 base addressSergei Shtylyov2011-04-251-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 54ce6883d29630ff334bee4256a25e3f8719a181 (davinci: da8xx: add spi resources and registration routine) wrongly assumed that SPI1 is mapped at the same address on DA830/OMAP-L137 and DA850/OMAP-L138; actually, the base address was valid only for the latter SoC. Teach the code to pass the correct SPI1 memory resource for both SoCs... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| | * | | | davinci: mityomapl138: Use auto-probe to determine attached PHY IDMichael Williamson2011-04-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current board configurations involving the MityDSP-L138 and MityARM-1808 only have one attached PHY, but it's address may not be the same. Default the behavior to auto-probe for the PHY and use the first one found. Signed-off-by: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| | * | | | davinci: mityomapl138: Use correct id for NAND controllerMichael Williamson2011-04-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the MityDSP-L138/MityARM-1808 SOMS, the NAND controller id (which needs to correspond to the chipselect, and is used for controlling the HW ECC computation) is not correct. Fix it. Signed-off-by: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| | * | | | davinci: fix DEBUG_LL code for p2v changesKevin Hilman2011-04-192-6/+9
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixup davinci UART low-level debug code for new ARM generic p2v changes. Based on OMAP changes by Tony Lindgren Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | | | Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into fixesRussell King2011-04-275-5/+24
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