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* | MIPS: BCM47xx: Activate SSB_B43_PCI_BRIDGE by defaultHauke Mehrtens2010-08-051-0/+1
|/ | | | | | | | | | | B43_pci_bridge is needed to use the b43 driver with brcm47xx. Activate it by default if PCI is available. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1510/ Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2F: Add gpio/gpioilb supportArnaud Patard2010-05-211-0/+2
| | | | | | | Signed-off-by: Arnaud Patard <apatard@mandriva.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1163/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add CPU_LOONGSON2F_WORKAROUNDSWu Zhangjin2010-04-301-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As documented in the Loongson 2F User Manual [2, 3], the old Loongson2F series (2F01 / 2F02) have the NOP & JUMP issues which requires workarounds in the kernel and binutils. This issue has been rectified in Loongson 2F series 2F03 so no workarounds needed. Now that the workarounds [1] adding the the -mfix-loongson2f-nop and -mfix-loongson2f-jump options have been comitted to the binutils the CVS repository), we can add the workarounds in the kernel. The workarounds have no significant side effect on the system but may decrease performance so we control them through a a new CPU_LOONGSON2F_WORKAROUNDS config option allowing the users to only enable it as necessary. [1] "Fixups of Loongson2F" patch for binutils(actually for gas) http://sourceware.org/ml/binutils/2009-11/msg00387.html [2] Chapter 15 of "Loongson2F User Manual"(Chinese Version) http://www.loongson.cn/uploadfile/file/200808211 [3] English Version of the above chapter 15 http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1105/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Kconfig: Make Broadcom SoC support naming consistentFlorian Fainelli2010-04-301-1/+1
| | | | | | | Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1082/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Swarm, Littlesur: Enable PATA platform driver.Sebastian Andrzej Siewior2010-04-301-0/+2
| | | | | | | | | | | | | According to include/asm/sibyte/swarm.h both systems provide a platform device for the ide controler. Until now the IDE subsystem was used which is deprecated by now. The same structure can be used with the PATA driver. Signed-off-by: Sebastian Andrzej Siewior <sebatian@breakpoint.cc> Cc: tbm@cyrius.com Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1127/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* pci-dma: mips: use include/linux/pci-dma.hFUJITA Tomonori2010-03-121-2/+2
| | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* MIPS: Support 36-bit iomem on 32-bit Au1x00pascal@pabr.org2010-02-271-0/+3
| | | | | | | | | | | | I believe these changes are needed on Alchemy SoCs in order to use iomem above 4G with the usual platform_device machinery: - Set CONFIG_ARCH_PHYS_ADDR_T_64BIT to make resource_size_t 64-bit. - Increase IOMEM_RESOURCE_END so that platforms can register resources. To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/814/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: Implement gpiolibFlorian Fainelli2010-02-271-1/+1
| | | | | | | | | This patch implements gpiolib for the AR7 SoC. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/816/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Remove the serial port output of compressed kernel supportWu Zhangjin2010-02-271-1/+1
| | | | | | | | | | | | | | | The compressed kernel support on loongson family machines is stable now, so, remove the debug information via using SYS_SUPPORTS_ZBOOT instead of SYS_SUPPORTS_ZBOOT_UART16550. This may reduce the image size and speedup the booting. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/824/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Use optimized memory barrier primitives.David Daney2010-02-271-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to achieve correct synchronization semantics, the Octeon port had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC. This resulted in code that looks like: sync ll ... . . . sc ... . . sync The second SYNC was redundant, but harmless. Octeon has a SYNCW instruction that acts as a write-memory-barrier (due to an erratum in some parts two SYNCW are used). It is much faster than SYNC because it imposes ordering on the writes, but doesn't otherwise stall the execution pipeline. On Octeon, SYNC stalls execution until all preceeding writes are committed to the coherent memory system. Using: syncw;syncw ll . . . sc . . Has identical semantics to the first sequence, but is much faster. The SYNCW orders the writes, and the SC will not complete successfully until the write is committed to the coherent memory system. So at the end all preceeding writes have been committed. Since Octeon does not do speculative reads, this functions as a full barrier. The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes SYNCW for SYNC in write-memory-barriers. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/850/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add support of LZO-compressed kernelsWu Zhangjin2010-01-281-0/+1
| | | | | | | | | | | The necessary changes to the x86 Kconfig and boot/compressed to allow the use of this new compression method. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Patchwork: http://patchwork.linux-mips.org/patch/857/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: No longer hardwire CONFIG_EMBEDDED to yMartin Michlmayr2009-12-171-2/+0
| | | | | | | | | | | | | | | | | | There's no reason for MIPS to select EMBEDDED. In fact, EMBEDDED makes MIPS more awkward to deal with because it makes it different to the majority of architectures for no good reason. [Ralf: Historically disabling EMBEDDED had hid essential options for many MIPS platforms such as serial console and forced crap like VGA support or power managment enabled for platforms where those don't make any sense. The name of the option is also _very_ missleading so many users don't select it even where is was required for a functioning kernel.] Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/663/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: eXcite: Remove platform.Ralf Baechle2009-12-171-18/+0
| | | | | | | | | | | | | The platform has never been fully merged Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Thomas Koeller <thomas.koeller@baslerweb.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: linux-kernel@vger.kernel.org Cc: linux-mtd@lists.infradead.org Acked-by: David Woodhouse <David.Woodhouse@intel.com> Acked-by: Wim Van Sebroeck <wim@iguana.be>
* MIPS: Move EARLY_PRINTK to Kconfig.debugRalf Baechle2009-12-171-14/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Tracing: Add function graph tracer support for MIPSWu Zhangjin2009-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The implementation of function graph tracer for MIPS is a little different from X86. in MIPS, gcc(with -pg) only transfer the caller's return address(at) and the _mcount's return address(ra) to us. For the kernel part without -mlong-calls: move at, ra jal _mcount For the module part with -mlong-calls: lui v1, hi16bit_of_mcount addiu v1, v1, low16bit_of_mcount move at, ra jal _mcount Without -mlong-calls, if the function is a leaf, it will not save the return address(ra): ffffffff80101298 <au1k_wait>: ffffffff80101298: 67bdfff0 daddiu sp,sp,-16 ffffffff8010129c: ffbe0008 sd s8,8(sp) ffffffff801012a0: 03a0f02d move s8,sp ffffffff801012a4: 03e0082d move at,ra ffffffff801012a8: 0c042930 jal ffffffff8010a4c0 <_mcount> ffffffff801012ac: 00020021 nop so, we can hijack it directly in _mcount, but if the function is non-leaf, the return address is saved in the stack. ffffffff80133030 <copy_process>: ffffffff80133030: 67bdff50 daddiu sp,sp,-176 ffffffff80133034: ffbe00a0 sd s8,160(sp) ffffffff80133038: 03a0f02d move s8,sp ffffffff8013303c: ffbf00a8 sd ra,168(sp) ffffffff80133040: ffb70098 sd s7,152(sp) ffffffff80133044: ffb60090 sd s6,144(sp) ffffffff80133048: ffb50088 sd s5,136(sp) ffffffff8013304c: ffb40080 sd s4,128(sp) ffffffff80133050: ffb30078 sd s3,120(sp) ffffffff80133054: ffb20070 sd s2,112(sp) ffffffff80133058: ffb10068 sd s1,104(sp) ffffffff8013305c: ffb00060 sd s0,96(sp) ffffffff80133060: 03e0082d move at,ra ffffffff80133064: 0c042930 jal ffffffff8010a4c0 <_mcount> ffffffff80133068: 00020021 nop but we can not get the exact stack address(which saved ra) directly in _mcount, we need to search the content of at register in the stack space or search the "s{d,w} ra, offset(sp)" instruction in the text. 'Cause we can not prove there is only a match in the stack space, so, we search the text instead. as we can see, if the first instruction above "move at, ra" is not a store instruction, there should be a leaf function, so we hijack the at register directly via putting &return_to_handler into it, otherwise, we search the "s{d,w} ra, offset(sp)" instruction to get the stack offset, and then the stack address. we use the above copy_process() as an example, we at last find "ffbf00a8", 0xa8 is the stack offset, we plus it with s8(fp), that is the stack address, we hijack the content via writing the &return_to_handler in. If with -mlong-calls, since there are two more instructions above "move at, ra", so, we can move the pointer to the position above "lui v1, hi16bit_of_mcount". Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/677/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Tracing: Add dynamic function tracer supportWu Zhangjin2009-12-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With dynamic function tracer, by default, _mcount is defined as an "empty" function, it returns directly without any more action . When enabling it in user-space, it will jump to a real tracing function(ftrace_caller), and do the real job for us. Differ from the static function tracer, dynamic function tracer provides two functions ftrace_make_call()/ftrace_make_nop() to enable/disable the tracing of some indicated kernel functions(set_ftrace_filter). In the -v4 version, the implementation of this support is basically the same as X86 version does: _mcount is implemented as an empty function and ftrace_caller is implemented as a real tracing function respectively. But in this version, to support module tracing with the help of -mlong-calls in arch/mips/Makefile: MODFLAGS += -mlong-calls. The stuff becomes a little more complex. We need to cope with two different type of calling to _mcount. For the kernel part, the calling to _mcount(result of "objdump -hdr vmlinux"). is like this: 108: 03e0082d move at,ra 10c: 0c000000 jal 0 <fpcsr_pending> 10c: R_MIPS_26 _mcount 10c: R_MIPS_NONE *ABS* 10c: R_MIPS_NONE *ABS* 110: 00020021 nop For the module with -mlong-calls, it looks like this: c: 3c030000 lui v1,0x0 c: R_MIPS_HI16 _mcount c: R_MIPS_NONE *ABS* c: R_MIPS_NONE *ABS* 10: 64630000 daddiu v1,v1,0 10: R_MIPS_LO16 _mcount 10: R_MIPS_NONE *ABS* 10: R_MIPS_NONE *ABS* 14: 03e0082d move at,ra 18: 0060f809 jalr v1 In the kernel version, there is only one "_mcount" string for every kernel function, so, we just need to match this one in mcount_regex of scripts/recordmcount.pl, but in the module version, we need to choose one of the two to match. Herein, I choose the first one with "R_MIPS_HI16 _mcount". and In the kernel verion, without module tracing support, we just need to replace "jal _mcount" by "jal ftrace_caller" to do real tracing, and filter the tracing of some kernel functions via replacing it by a nop instruction. but as we have described before, the instruction "jal ftrace_caller" only left 32bit length for the address of ftrace_caller, it will fail when calling from the module space. so, herein, we must replace something else. the basic idea is loading the address of ftrace_caller to v1 via changing these two instructions: lui v1,0x0 addiu v1,v1,0 If we want to enable the tracing, we need to replace the above instructions to: lui v1, HI_16BIT_ftrace_caller addiu v1, v1, LOW_16BIT_ftrace_caller If we want to stop the tracing of the indicated kernel functions, we just need to replace the "jalr v1" to a nop instruction. but we need to replace two instructions and encode the above two instructions oursevles. Is there a simpler solution? Yes! Here it is, in this version, we put _mcount and ftrace_caller together, which means the address of _mcount and ftrace_caller is the same: _mcount: ftrace_caller: j ftrace_stub nop ...(do real tracing here)... ftrace_stub: jr ra move ra, at By default, the kernel functions call _mcount, and then jump to ftrace_stub and return. and when we want to do real tracing, we just need to remove that "j ftrace_stub", and it will run through the two "nop" instructions and then do the real tracing job. what about filtering job? we just need to do this: lui v1, hi_16bit_of_mcount <--> b 1f (0x10000004) addiu v1, v1, low_16bit_of_mcount move at, ra jalr v1 nop 1f: (rec->ip + 12) In linux-mips64, there will be some local symbols, whose name are prefixed by $L, which need to be filtered. thanks goes to Steven for writing the mips64-specific function_regex. In a conclusion, with RISC, things becomes easier with such a "stupid" trick, RISC is something like K.I.S.S, and also, there are lots of "simple" tricks in the whole ftrace support, thanks goes to Steven and the other folks for providing such a wonderful tracing framework! Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/675/ Acked-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Tracing: Enable HAVE_FUNCTION_TRACE_MCOUNT_TEST for MIPSWu Zhangjin2009-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | There is an exisiting common ftrace_test_stop_func() in kernel/trace/ftrace.c, which is used to check the global variable ftrace_trace_stop to determine whether stop the function tracing. This patch implepment the MIPS specific one to speedup the procedure. Thanks goes to Zhang Le for Cleaning it up. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/673/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Tracing: Add static function tracer support for MIPSWu Zhangjin2009-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | If -pg of gcc is enabled with CONFIG_FUNCTION_TRACER=y. a calling to _mcount will be inserted into each kernel function. so, there is a possibility to trace the kernel functions in _mcount. This patch add the MIPS specific _mcount support for static function tracing. by default, ftrace_trace_function is initialized as ftrace_stub(an empty function), so, the default _mcount will introduce very little overhead. after enabling ftrace in user-space, it will jump to a real tracing function and do static function tracing for us. and -ffunction-sections is incompatible with -pg, so, disable it when ftracer is enabled. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Reviewed-by: Steven Rostedt <rostedt@goodmis.org> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/672/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add basic CPUFreq options.Wu Zhangjin2009-12-171-0/+3
| | | | | | | | | | | | | | | | | This patch adds basic options for MIPS CPUFreq support. Since the cp0 timer's frequency is based on the processor clockrate it can not be used with CPUFReq; an additional external timer is required. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: cpufreq@vger.kernel.org, Cc: Dave Jones <davej@redhat.com>, Cc: Dominik Brodowski <linux@dominikbrodowski.net>, Cc: yanh@lemote.com Cc: huhb@lemote.com, Patchwork: http://patchwork.linux-mips.org/patch/659/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PowerTV: Base files for Cisco PowerTV platformDavid VomLehn2009-12-171-0/+22
| | | | | | | | | | | | Add the Cisco Powertv cable settop box to the MIPS tree. This platform is based on a MIPS 24Kc processor with various devices integrated on the same ASIC. There are multiple models of this box, with differing configuration but the same kernel runs across the product line. Signed-off-by: David VomLehn <dvomlehn@cisco.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/132/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add support for uncached accelerated mappings.Wu Zhangjin2009-12-171-0/+3
| | | | | | | | | | Loongson2f support video acceleration. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/624/ Patchwork: http://patchwork.linux-mips.org/patch/625/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2F: Cleanup the #if clausesWu Zhangjin2009-12-171-0/+6
| | | | | | | | | | | | | | This patch adds two new kernel options: CPU_SUPPORTS_CPUFREQ and CPU_SUPPORTS_ADDRWINCFG to describe the new features of Loongons 2F and replaces the several ugly #if clauses by them. These two options will be utilized by the future loongson revisions and related drivers such as the coming Loongson 2F CPUFreq driver. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lemote 2f: Enable legacy RTC driverWu Zhangjin2009-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently rtclib is not available on Loongson family machines but the legacy RTC driver works well on them. Deselect RTC_LIB to allow the legacy RTC driver to be selected. The rtclib patch series http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=a91e34bf2595157830d599cb66becd52247b1819.1257383766.git.wuzhangjin%40gmail.com or, in patchworks: http://patchwork.linux-mips.org/patch/570/ http://patchwork.linux-mips.org/patch/571/ http://patchwork.linux-mips.org/patch/572/ is eventually going to switch Lemote platforms to rtclib. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: zhangfx@lemote.com Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: Nicholas Mc Guire <hofrat@hofr.at> Cc: Arnaud Patard <apatard@mandriva.com> Cc: loongson-dev@googlegroups.com Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add basic Loongson 2F supportWu Zhangjin2009-12-171-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller has a programming interface similiar to the the FPGA northbridge used on Loongson 2E. The main differences between Loongson 2E and Loongson 2F include: 1. Loongson 2F has an extra address window configuration module, which is used to map CPU address space to DDR or PCI address space, or map the PCI-DMA address space to DDR or LIO address space. 2. Loongson 2F supports 8 levels of software configurable CPu frequency which can be configured in the LOONGSON_CHIPCFG0 register. The coming cpufreq and standby support are based on this feature. Loongson.h abstracts the modules and corresponding methods are abstracted. Add other Loongson-2F-specific source code including gcc 4.4 support, PCI memory space, PCI IO space, DMA address. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove addinitrd and CONFIG_PROBE_INITRD_HEADERRalf Baechle2009-12-171-9/+0
| | | | | | Addinitrd has been superseded by initramfs ages ago. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.David Daney2009-12-171-0/+3
| | | | | | | | | | | | | | Processors that support the mips64r2 ISA can in four instructions convert a shifted PGD pointer stored in the upper bits of c0_context into a usable pointer. By doing this we save a memory load and associated potential cache miss in the TLB exception handlers. Since the upper bits of c0_context were holding the CPU number, we move this to the upper bits of c0_xcontext which doesn't have enough bits to hold the PGD pointer, but has plenty for the CPU number. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add support for GZIP / BZIP2 / LZMA compressed kernel imagesWu Zhangjin2009-12-171-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch helps to generate smaller kernel images for linux-MIPS, Here is the effect when using lzma: $ ls -sh vmlinux 7.1M vmlinux $ ls -sh vmlinuz 1.5M vmlinuz Have tested the 32bit kernel on Qemu/Malta and 64bit kernel on FuLoong Mini PC. both of them work well. and also, tested by Alexander Clouter on an AR7 based Linksys WAG54Gv2, and by Manuel Lauss on an Alchemy board. This -v2 version incorporate the feedback from Ralf, and add the following changes: 1. add .ecoff, .bin, .erec format support 2. only enable it and the debug source code for the machines we tested 3. a dozen of fixups and cleanups and if you want to enable it for your board, please try to select SYS_SUPPORTS_ZBOOT for it, and if the board have an 16550 compatible uart, you can select SYS_SUPPORTS_ZBOOT_UART16550 directly. and then sending the relative patches to Ralf. Tested-by: Manuel Lauss <manuel.lauss@googlemail.com> Tested-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Switch from flatmem to sparsememWu Zhangjin2009-12-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | With flatmem hibernation for Loongson will fail, and there are also some other problems such as broken files when using NFS or CIFS / Samba. The config help of sparsemem says: "This option provides some potential performance benefits, along with decreased code complexity." So to avoid the potential problems of FLATMEM, we disable FLATMEM directly and use SPARSEMEM instead. Related email thread: http://groups.google.com/group/loongson-dev/browse_thread/thread/b6b65890ec2b0f24/feb43e5aa7f55d9b?show_docid=feb43e5aa7f55d9b Reported-by: Tatu Kilappa <tatu.kilappa@gmail.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/737/ Cc: linux-mips@linux-mips.org Cc: zhangfx@lemote.com Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Disallow 4kB pagesWu Zhangjin2009-12-011-0/+1
| | | | | | | | | | | | | | | | | | | | | Currently, with PAGE_SIZE_4KB, the kernel for loongson will hang on: Kernel panic - not syncing: Attempted to kill init! The possible reason is the cache aliases problem: Loongson 2F has 64kb, 4 way L1 Cache, the way size is 16kb, which is bigger then 4kb. so, If using 4kb page size, there is cache aliases problem. To avoid this kind of problem, extra cache flushing. The 2nd possible solution is 16kb page size which avoids cache aliases without the need for extra cache flushes. So we disable 4kB pages until the aliasing issue is solved. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/736/ Cc: linux-mips@linux-mips.org Cc: zhangfx@lemote.com Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP22/IP28 Disable early printk to fix boot problems on some systems.Martin Michlmayr2009-12-011-2/+16
| | | | | | | | | | | | | | Some Debian users have reported that the kernel hangs early during boot on some IP22 systems. Thomas Bogendoerfer found that this is due to a "bad interaction between CONFIG_EARLY_PRINTK and overwritten prom memory during early boot". Since there's no fix yet, disable CONFIG_EARLY_PRINTK for now. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Cc: linux-mips@linux-mips.org Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Dmitri Vorobiev <dmitri.vorobiev@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/702/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add DMA declare coherent memory supportYoichi Yuasa2009-11-131-0/+1
| | | | | | | | | | | | | The ohci-sm501 driver requires dma_declare_coherent_memory(). It is used by the driver's local memory allocation with dma_alloc_coherent(). Tested on TANBAC TB0287(VR4131 + SM501). [Ralf: Fixed reject in dma-default.c and removed the entire #if 0'ed block in dma-mapping.h instead of just the #if 0.] Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Set S-cache linesize to 64-bytes for MTI's S-cacheRalf Baechle2009-11-021-0/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT.Ralf Baechle2009-11-021-2/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.Maxime Bizon2009-09-171-0/+16
| | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Get rid of CONFIG_CPU_HAS_LLSCRalf Baechle2009-09-171-20/+0
| | | | | | | | CONFIG_CPU_HAS_LLSC duplicated the function of cpu_has_llsc for no good reason and and the results if the one was enabled and the other disabled was very unobvious. Remove it now that there are no more remaining users. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add GCC 4.4 support for Loongson2EWu Zhangjin2009-09-171-7/+11
| | | | | | | | | | | | | | | | Because only gcc >=4.4 have loongson-specific support, we need to choose the suitable -march argument for gcc <= 4.3 and gcc >= 4.4, and here, we use -march=loongson2e for loongson2e. Thanks goes to Arnaud Patard <apatard@mandriva.com> for suggestion of using cc-options(Documentation/kbuild/makefiles.txt). and thanks Zhang Le for introducing the new CPU_LOONGSON2E kernel option. NOTE: -mtune option is not need if -march and -mtune use the same value. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Split common loongson source code outWu Zhangjin2009-09-171-23/+9
| | | | | | | | | | | To share common loongson source code between all of the loongson-based machines. there is a need to split it out of the fuloong-2e/ directory. at the same time, other according tuning is needed. the machine-specific parts are defined as macros in relative header file, pci.h, mem.h, machine.h. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Change naming methodsWu Zhangjin2009-09-171-4/+4
| | | | | | | | | | | | To make source code of loongson sharable to the machines(such as gdium) made by the other companies, we rename arch/mips/lemote to arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to FULOONG2E to make it distinguishable to the future FULOONG2F. and also, some other relative tuning is needed. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: RTC: Enable legacy RTC driver on fulongWu Zhangjin2009-09-171-1/+1
| | | | | | | | | | RTC_LIB is selected by MIPS by default, and therefore, the legacy RTC driver is disabled. but fortunately, RTC_LIB not works on fulong, so, enabling the legcy RTC driver is needed, otherwise, the tools like hwclock will not work. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Allow suspend and hibernation again on uniprocessor kernels.Ralf Baechle2009-07-031-2/+2
| | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Pavel Machek <pavel@ucw.cz>
* MIPS: CMP: Update sync-r4k for current kernelTim Anderson2009-07-031-1/+1
| | | | | | | | This revises the sync-4k so it will boot and operate since the removal of expirelo from the timer code. Signed-off-by: Tim Anderson <tanderson@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: CMP: activate CMP supportTim Anderson2009-07-031-1/+1
| | | | | | | | | Most of the CMP support was added before, this mostly correct compile problems but adds a platform specific translation for the interrupt number based on cpu number. Signed-off-by: Tim Anderson <tanderson@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Update VR41xx GPIO driver to use gpiolibYoichi Yuasa2009-07-031-0/+1
| | | | | Signed-off-by: Yoichi Yuasa <yyuasa@linux.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add support for Texas Instruments AR7 System-on-a-ChipFlorian Fainelli2009-07-031-0/+20
| | | | | | | | | | | | This patch adds support for the Texas Instruments AR7 System-on-a-Chip. It supports the TNETD7100, 7200 and 7300 versions of the SoC. Signed-off-by: Matteo Croce <matteo@openwrt.org> Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Eugene Konev <ejka@openwrt.org> Signed-off-by: Nicolas Thill <nico@openwrt.org> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Cavium: Add CPU hotplugging code.Ralf Baechle2009-06-241-0/+2
| | | | | | Thanks to Cavium Inc. for the code contribution and help. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SMP: Allow suspend and hibernation if CPU hotplug is availableRalf Baechle2009-06-241-2/+2
| | | | | | | | The SMP implementation of suspend and hibernate depends on CPU hotplugging. In the past we didn't have CPU hotplug so suspend and hibernation were not possible on SMP systems. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add arch generic CPU hotplugRalf Baechle2009-06-241-1/+10
| | | | | | | | | | | | | Each platform has to add support for CPU hotplugging itself by providing suitable definitions for the cpu_disable and cpu_die of the smp_ops methods and setting SYS_SUPPORTS_HOTPLUG_CPU. A platform should only set SYS_SUPPORTS_HOTPLUG_CPU once all it's smp_ops definitions have the necessary changes. This patch contains the changes to the dummy smp_ops definition for uni-processor systems. Parts of the code contributed by Cavium Inc. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add hibernation supportWu Zhangjin2009-06-171-0/+4
| | | | | | | | | | | | | | | [Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't support. As implemented in this patch cache and tlb flushing will also be invoked with interrupts disabled so smp_call_function() will blow up in charming ways. So limit to !SMP.] Reviewed-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Yan Hua <yanh@lemote.com> Reviewed-by: Arnaud Patard <apatard@mandriva.com> Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Hu Hongbing <huhb@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Kconfig Add SYS_SUPPORTS_HUGETLBFS and enable it for some systems.David Daney2009-06-171-0/+11
| | | | | | | | | Add new kconfig variables SYS_SUPPORTS_HUGETLBFS and CPU_SUPPORTS_HUGEPAGES. They are enabled for systems that are known to support huge pages. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add Cavium OCTEON PCI support.David Daney2009-06-171-0/+2
| | | | | | | | This patch adds support for PCI and PCIe to the base Cavium OCTEON processor support. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.1 at 2024-05-31 17:23:18 +0000